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Searched refs:CMP4 (Results 1 – 25 of 30) sorted by relevance

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/external/llvm-project/llvm/test/Transforms/SCCP/
Dintrinsics.ll19 ; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i8 [[ABS]], 9
20 ; CHECK-NEXT: call void @use(i1 [[CMP4]])
72 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ult i8 [[M]], 14
73 ; CHECK-NEXT: call void @use(i1 [[CMP4]])
/external/llvm-project/llvm/test/Transforms/HardwareLoops/
Dscalar-while.ll11 ; CHECK-DEC-NEXT: [[CMP4:%.*]] = icmp ult i32 [[I:%.*]], [[N:%.*]]
12 ; CHECK-DEC-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]]
29 ; CHECK-PHI-NEXT: [[CMP4:%.*]] = icmp ult i32 [[I:%.*]], [[N:%.*]]
30 ; CHECK-PHI-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]]
49 ; CHECK-NESTED-NEXT: [[CMP4:%.*]] = icmp ult i32 [[I:%.*]], [[N:%.*]]
50 ; CHECK-NESTED-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]]
67 ; CHECK-GUARD-NEXT: [[CMP4:%.*]] = icmp ult i32 [[I:%.*]], [[N:%.*]]
69 ; CHECK-GUARD-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*]]
85 ; CHECK-PHIGUARD-NEXT: [[CMP4:%.*]] = icmp ult i32 [[I:%.*]], [[N:%.*]]
87 ; CHECK-PHIGUARD-NEXT: br i1 [[CMP4]], label [[WHILE_BODY_PREHEADER:%.*]], label [[WHILE_END:%.*…
[all …]
/external/llvm-project/llvm/test/Transforms/PhaseOrdering/
Dreassociate-after-unroll.ll12 ; OLDPM-NEXT: [[CMP4:%.*]] = icmp eq i64 [[LIMIT:%.*]], 0
13 ; OLDPM-NEXT: br i1 [[CMP4]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
59 ; NEWPM-NEXT: [[CMP4:%.*]] = icmp eq i64 [[LIMIT:%.*]], 0
60 ; NEWPM-NEXT: br i1 [[CMP4]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/
Dult-sub-to-eq.ll12 ; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i32 [[DATA_LEN]], [[SAMPLE]]
13 ; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
Dpredicated_ranges.ll310 ; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[I_INC]], [[ARG]]
311 ; CHECK-NEXT: br i1 [[CMP4]], label [[OUTER]], label [[EXIT]]
371 ; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[I_INC]], [[SUB1]]
372 ; CHECK-NEXT: br i1 [[CMP4]], label [[OUTER]], label [[EXIT]]
431 ; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[I_INC]], [[ARG]]
432 ; CHECK-NEXT: br i1 [[CMP4]], label [[OUTER]], label [[EXIT]]
Dlftr.ll401 ; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i32 [[DATA_LEN]], [[SAMPLE]]
402 ; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
Dwiden-loop-comp.ll22 ; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP0]], 0
23 ; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY_LR_PH:%.*]]
/external/llvm-project/llvm/test/Transforms/CorrelatedValuePropagation/
Dicmp.ll636 ; CHECK-NEXT: [[CMP4:%.*]] = icmp uge i32 [[A]], 42
637 ; CHECK-NEXT: call void @check1(i1 [[CMP4]])
673 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[A]], 42
674 ; CHECK-NEXT: call void @check1(i1 [[CMP4]])
786 ; CHECK-NEXT: [[CMP4:%.*]] = icmp sge i32 [[A]], 42
787 ; CHECK-NEXT: call void @check1(i1 [[CMP4]])
823 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ule i32 [[A]], 42
824 ; CHECK-NEXT: call void @check1(i1 [[CMP4]])
860 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ult i32 [[A]], 42
861 ; CHECK-NEXT: call void @check1(i1 [[CMP4]])
[all …]
/external/llvm-project/llvm/test/Transforms/LICM/
Dsink-foldable.ll26 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i8* [[L1]], [[Q]]
28 ; CHECK-NEXT: br i1 [[CMP4]], label [[LOOPEXIT1:%.*]], label [[FOR_BODY]]
184 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i8* [[L1]], [[Q]]
186 ; CHECK-NEXT: br i1 [[CMP4]], label [[LOOPEXIT1:%.*]], label [[FOR_BODY]]
/external/llvm-project/llvm/test/Transforms/MergeICmps/X86/
Dpr36557.ll48 ; X86-NEXT: [[CMP4:%.*]] = icmp eq i32 [[TMP10]], [[TMP11]]
51 ; X86-NEXT: [[TMP12:%.*]] = phi i1 [ false, [[BB3]] ], [ [[CMP4]], [[BB4]] ]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dvector-casts.ll100 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp ult <4 x float> [[B:%.*]], zeroinitializer
101 ; CHECK-NEXT: [[AND1:%.*]] = and <4 x i1> [[CMP]], [[CMP4]]
118 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp ult <4 x float> [[B:%.*]], zeroinitializer
119 ; CHECK-NEXT: [[AND1:%.*]] = or <4 x i1> [[CMP]], [[CMP4]]
136 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp ult <4 x float> [[B:%.*]], zeroinitializer
137 ; CHECK-NEXT: [[AND1:%.*]] = xor <4 x i1> [[CMP]], [[CMP4]]
Dgep-combine-loop-invariant.ll37 ; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP4]], [[LIMIT:%.*]]
38 ; CHECK-NEXT: br i1 [[CMP4]], label [[LAND_LHS_TRUE:%.*]], label [[DO_END]]
/external/llvm-project/llvm/test/Transforms/InstSimplify/
Dassume_icmp.ll98 ; CHECK-NEXT: [[CMP4:%.*]] = icmp uge i32 [[X]], [[Y]]
99 ; CHECK-NEXT: call void @use(i1 [[CMP4]])
/external/llvm-project/llvm/test/Transforms/LoopVectorize/ARM/
Dtail-fold-multiple-icmps.ll54 ; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP9]], [[MIN_028]]
55 ; CHECK-NEXT: [[COND9]] = select i1 [[CMP4]], i32 [[TMP9]], i32 [[MIN_028]]
/external/llvm-project/llvm/test/Transforms/LoopUnroll/
Dpeel-loop.ll30 ; CHECK: br i1 %[[CMP4:.*]], label %[[LOOP_PH]], label %for.end, !llvm.loop !{{.*}}
86 ; CHECK: br i1 %[[CMP4:.*]], label %[[LOOP_PH]], label %for.end, !llvm.loop !{{.*}}
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/AMDGPU/
Dhorizontal-store.ll126 ; GFX9-NEXT: [[CMP4:%.*]] = fcmp fast ogt float [[SELECT3]], [[LOAD5]]
127 ; GFX9-NEXT: [[SELECT4:%.*]] = select i1 [[CMP4]], float [[SELECT3]], float [[LOAD5]]
177 ; GFX9-NEXT: [[CMP4:%.*]] = fcmp fast olt double [[SELECT3]], [[LOAD5]]
178 ; GFX9-NEXT: [[SELECT4:%.*]] = select i1 [[CMP4]], double [[SELECT3]], double [[LOAD5]]
Dreduction.ll364 ; VI-NEXT: [[CMP4:%.*]] = icmp ult i16 [[ELT5]], [[MIN4]]
365 ; VI-NEXT: [[MIN5:%.*]] = select i1 [[CMP4]], i16 [[ELT5]], i16 [[MIN4]]
446 ; VI-NEXT: [[CMP4:%.*]] = icmp slt i16 [[ELT5]], [[MIN4]]
447 ; VI-NEXT: [[MIN5:%.*]] = select i1 [[CMP4]], i16 [[ELT5]], i16 [[MIN4]]
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dreduction2.ll102 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp olt double [[TMP9]], 0x3EB0C6F7A0B5ED8D
103 ; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP]], [[CMP4]]
Dinsert-after-bundle.ll639 ; SSE-NEXT: [[CMP4:%.*]] = icmp ult i64 [[INDVARS_IV]], 63
640 ; SSE-NEXT: br i1 [[CMP4]], label [[FOR_BODY5]], label [[FOR_END14:%.*]]
673 ; AVX512-NEXT: [[CMP4:%.*]] = icmp ult i64 [[INDVARS_IV]], 63
674 ; AVX512-NEXT: br i1 [[CMP4]], label [[FOR_BODY5]], label [[FOR_END14:%.*]]
Dhorizontal-list.ll279 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp fast ogt float [[TMP3]], [[TMP4]]
280 ; CHECK-NEXT: [[MAX_0_MUL3:%.*]] = select i1 [[CMP4]], float [[TMP3]], float [[TMP4]]
301 ; THRESHOLD-NEXT: [[CMP4:%.*]] = fcmp fast ogt float [[TMP3]], [[TMP4]]
302 ; THRESHOLD-NEXT: [[MAX_0_MUL3:%.*]] = select i1 [[CMP4]], float [[TMP3]], float [[TMP4]]
/external/llvm-project/llvm/test/Transforms/LoopUnroll/ARM/
Dloop-unrolling.ll218 ; CHECK-UNROLL-T2: [[CMP4:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR4:%[a-z.0-9]+]], null
219 ; CHECK-UNROLL-T2: br i1 [[CMP4]], label [[END]]
/external/llvm-project/llvm/test/Transforms/PhaseOrdering/X86/
Dvector-reductions.ll185 ; CHECK-NEXT: [[CMP4:%.*]] = fcmp fast ole float [[TMP6]], [[TOLERANCE:%.*]]
186 ; CHECK-NEXT: [[COND5:%.*]] = zext i1 [[CMP4]] to i32
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/ARM/
Dindvar-cost.ll53 ; CHECK-T1-NEXT: [[CMP4:%.*]] = icmp ne i32 [[DEC12]], 0
54 ; CHECK-T1-NEXT: [[TMP3:%.*]] = and i1 [[CMP4]], [[CMP3]]
224 ; CHECK-T2-NEXT: [[CMP4:%.*]] = icmp ne i32 [[DEC12]], 0
225 ; CHECK-T2-NEXT: [[TMP3:%.*]] = and i1 [[CMP4]], [[CMP3]]
/external/llvm-project/llvm/test/Transforms/LoopVectorize/X86/
Dfloat-induction-x86.ll20 ; AUTO_VEC-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N:%.*]], 0
21 ; AUTO_VEC-NEXT: br i1 [[CMP4]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
197 ; AUTO_VEC-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[N:%.*]], 0
198 ; AUTO_VEC-NEXT: br i1 [[CMP4]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
/external/llvm-project/llvm/test/Transforms/SimplifyCFG/
Dpreserve-branchweights.ll509 ; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i32 [[I_1]], [[V3]]
510 ; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[TOBOOL]], [[CMP4]]

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