| /external/jemalloc_new/test/include/test/ |
| D | SFMT-params216091.h | 42 #define SR1 10 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params4253.h | 42 #define SR1 7 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params607.h | 42 #define SR1 13 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params132049.h | 42 #define SR1 21 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params2281.h | 42 #define SR1 5 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params86243.h | 42 #define SR1 19 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params1279.h | 42 #define SR1 5 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params11213.h | 42 #define SR1 7 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params19937.h | 42 #define SR1 11 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-params44497.h | 42 #define SR1 9 macro
57 #define ALTI_SR1 (vector unsigned int)(SR1, SR1, SR1, SR1)
71 #define ALTI_SR1 {SR1, SR1, SR1, SR1}
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| D | SFMT-sse2.h | 68 y = _mm_srli_epi32(*b, SR1); in mm_recursion()
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| /external/jemalloc_new/test/src/ |
| D | SFMT.c | 251 r->u[0] = a->u[0] ^ x.u[0] ^ ((b->u[0] >> SR1) & MSK2) ^ y.u[0] in do_recursion()
253 r->u[1] = a->u[1] ^ x.u[1] ^ ((b->u[1] >> SR1) & MSK1) ^ y.u[1] in do_recursion()
255 r->u[2] = a->u[2] ^ x.u[2] ^ ((b->u[2] >> SR1) & MSK4) ^ y.u[2] in do_recursion()
257 r->u[3] = a->u[3] ^ x.u[3] ^ ((b->u[3] >> SR1) & MSK3) ^ y.u[3] in do_recursion()
268 r->u[0] = a->u[0] ^ x.u[0] ^ ((b->u[0] >> SR1) & MSK1) ^ y.u[0] in do_recursion()
270 r->u[1] = a->u[1] ^ x.u[1] ^ ((b->u[1] >> SR1) & MSK2) ^ y.u[1] in do_recursion()
272 r->u[2] = a->u[2] ^ x.u[2] ^ ((b->u[2] >> SR1) & MSK3) ^ y.u[2] in do_recursion()
274 r->u[3] = a->u[3] ^ x.u[3] ^ ((b->u[3] >> SR1) & MSK4) ^ y.u[3] in do_recursion()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.h | 65 unsigned *SR1 = nullptr,
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| D | PPCFrameLowering.cpp | 577 unsigned *SR1, in findScratchRegister() argument
584 if (SR1) in findScratchRegister()
585 *SR1 = R0; in findScratchRegister()
588 assert (SR1 && "Asking for the second scratch register but not the first?"); in findScratchRegister()
636 if (SR1) { in findScratchRegister()
638 *SR1 = FirstScratchReg == -1 ? (unsigned)PPC::NoRegister : FirstScratchReg; in findScratchRegister()
645 int SecondScratchReg = BV.find_next(*SR1); in findScratchRegister()
649 *SR2 = TwoUniqueRegsRequired ? (unsigned)PPC::NoRegister : *SR1; in findScratchRegister()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.h | 64 unsigned *SR1 = nullptr,
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| D | PPCFrameLowering.cpp | 616 unsigned *SR1, in findScratchRegister() argument
623 if (SR1) in findScratchRegister()
624 *SR1 = R0; in findScratchRegister()
627 assert (SR1 && "Asking for the second scratch register but not the first?"); in findScratchRegister()
674 if (SR1) { in findScratchRegister()
676 *SR1 = FirstScratchReg == -1 ? (unsigned)PPC::NoRegister : FirstScratchReg; in findScratchRegister()
683 int SecondScratchReg = BV.find_next(*SR1); in findScratchRegister()
687 *SR2 = TwoUniqueRegsRequired ? (unsigned)PPC::NoRegister : *SR1; in findScratchRegister()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.h | 64 Register *SR1 = nullptr,
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| D | PPCFrameLowering.cpp | 441 Register *SR1, in findScratchRegister() argument
448 if (SR1) in findScratchRegister()
449 *SR1 = R0; in findScratchRegister()
452 assert (SR1 && "Asking for the second scratch register but not the first?"); in findScratchRegister()
499 if (SR1) { in findScratchRegister()
501 *SR1 = FirstScratchReg == -1 ? (unsigned)PPC::NoRegister : FirstScratchReg; in findScratchRegister()
508 int SecondScratchReg = BV.find_next(*SR1); in findScratchRegister()
512 *SR2 = TwoUniqueRegsRequired ? Register() : *SR1; in findScratchRegister()
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
| D | stm32l4xx_hal_pwr.h | 209 (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
| D | stm32l4xx_hal_pwr.h | 209 (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonGenMux.cpp | 267 unsigned SR1 = Src1->isReg() ? Src1->getReg() : 0; in genMuxInBlock() local
276 if (CanDown && DU.Defs[SR1]) in genMuxInBlock()
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonGenMux.cpp | 306 Register SR1 = Src1->isReg() ? Src1->getReg() : Register(); in genMuxInBlock() local
315 if (CanDown && DU.Defs[SR1]) in genMuxInBlock()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonGenMux.cpp | 306 Register SR1 = Src1->isReg() ? Src1->getReg() : Register(); in genMuxInBlock() local
315 if (CanDown && DU.Defs[SR1]) in genMuxInBlock()
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| /external/llvm-project/llvm/test/Transforms/LoopVectorize/ |
| D | if-pred-non-void.ll | 59 ; CHECK: %[[SR1:[a-zA-Z0-9]+]] = insertelement <2 x i32> undef, i32 %[[SR0]], i32 0
62 ; CHECK: %{{.*}} = phi <2 x i32> [ undef, %{{.*}} ], [ %[[SR1]], %[[CSR]] ]
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l476xx.h | 653 __IO uint32_t SR1; /*!< PWR power status register 1, Address offset: 0x10 */ member
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