| /external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/ |
| D | sext-acc.ll | 8 ; CHECK: [[ACC:%[^ ]+]] = sext i32 %acc to i64
13 %sext.a.0 = sext i16 %ld.a.0 to i32
15 %sext.b.0 = sext i16 %ld.b.0 to i32
16 %mul.0 = mul i32 %sext.a.0, %sext.b.0
20 %sext.a.1 = sext i16 %ld.a.1 to i32
22 %sext.b.1 = sext i16 %ld.b.1 to i32
23 %mul.1 = mul i32 %sext.a.1, %sext.b.1
24 %sext.mul.0 = sext i32 %mul.0 to i64
25 %sext.mul.1 = sext i32 %mul.1 to i64
26 %add = add i64 %sext.mul.0, %sext.mul.1
[all …]
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| D | blocks.ll | 12 %sext.a.0 = sext i16 %ld.a.0 to i32
14 %sext.b.0 = sext i16 %ld.b.0 to i32
15 %mul.0 = mul i32 %sext.a.0, %sext.b.0
19 %sext.a.1 = sext i16 %ld.a.1 to i32
21 %sext.b.1 = sext i16 %ld.b.1 to i32
22 %mul.1 = mul i32 %sext.a.1, %sext.b.1
37 %sext.a.0 = sext i16 %ld.a.0 to i32
39 %sext.b.0 = sext i16 %ld.b.0 to i32
40 %mul.0 = mul i32 %sext.a.0, %sext.b.0
44 %sext.a.1 = sext i16 %ld.a.1 to i32
[all …]
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| D | exchange.ll | 14 %sext.a.0 = sext i16 %ld.a.0 to i32
18 %sext.a.1 = sext i16 %ld.a.1 to i32
19 %sext.b.1 = sext i16 %ld.b.1 to i32
20 %sext.b.0 = sext i16 %ld.b.0 to i32
21 %mul.0 = mul i32 %sext.a.0, %sext.b.1
22 %mul.1 = mul i32 %sext.a.1, %sext.b.0
39 %sext.a.0 = sext i16 %ld.a.0 to i32
43 %sext.a.1 = sext i16 %ld.a.1 to i32
44 %sext.b.1 = sext i16 %ld.b.1 to i32
45 %sext.b.0 = sext i16 %ld.b.0 to i32
[all …]
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| D | overlapping.ll | 22 %sext.a.0 = sext i16 %ld.a.0 to i32
26 %sext.a.1 = sext i16 %ld.a.1 to i32
27 %sext.b.1 = sext i16 %ld.b.1 to i32
28 %sext.b.0 = sext i16 %ld.b.0 to i32
29 %mul.0 = mul i32 %sext.a.0, %sext.b.0
30 %mul.1 = mul i32 %sext.a.1, %sext.b.1
35 %sext.a.2 = sext i16 %ld.a.2 to i32
36 %sext.b.2 = sext i16 %ld.b.2 to i32
37 %mul.2 = mul i32 %sext.a.2, %sext.b.2
66 %sext.a.0 = sext i16 %ld.a.0 to i32
[all …]
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| D | squaring.ll | 9 ; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32
12 ; CHECK-NEXT: [[CONV3:%.*]] = sext i16 [[TMP1]] to i32
16 ; CHECK-NEXT: [[CONV11:%.*]] = sext i16 [[TMP2]] to i32
20 ; CHECK-NEXT: [[CONV17:%.*]] = sext i16 [[TMP3]] to i32
24 ; CHECK-NEXT: [[CONV21:%.*]] = sext i16 [[TMP4]] to i32
38 %conv = sext i16 %1 to i32
41 %conv3 = sext i16 %2 to i32
45 %conv11 = sext i16 %3 to i32
49 %conv17 = sext i16 %4 to i32
53 %conv21 = sext i16 %5 to i32
[all …]
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| D | pr43073.ll | 6 ; CHECK: [[IN_MINUS_1:%[^ ]+]] = sext i16 [[LD_IN_MINUS_1]] to i32
9 ; CHECK: [[B_PLUS_1:%[^ ]+]] = sext i16 [[LD_B_PLUS_1]] to i32
30 %conv = sext i16 %0 to i32
32 %conv2 = sext i16 %1 to i32
36 %conv4 = sext i16 %2 to i32
39 %conv6 = sext i16 %3 to i32
44 %conv8 = sext i16 %4 to i32
47 %conv10 = sext i16 %5 to i32
52 %conv14 = sext i16 %6 to i32
55 %conv16 = sext i16 %7 to i32
[all …]
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | vec_cmp.ll | 14 %sext = sext <2 x i1> %cmp to <2 x i8>
15 ret <2 x i8> %sext
23 %sext = sext <4 x i1> %cmp to <4 x i8>
24 ret <4 x i8> %sext
32 %sext = sext <8 x i1> %cmp to <8 x i8>
33 ret <8 x i8> %sext
43 %sext = sext <16 x i1> %cmp to <16 x i8>
44 ret <16 x i8> %sext
52 %sext = sext <16 x i1> %cmp to <16 x i8>
53 ret <16 x i8> %sext
[all …]
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | vec_cmp.ll | 14 %sext = sext <2 x i1> %cmp to <2 x i8>
15 ret <2 x i8> %sext
23 %sext = sext <4 x i1> %cmp to <4 x i8>
24 ret <4 x i8> %sext
32 %sext = sext <8 x i1> %cmp to <8 x i8>
33 ret <8 x i8> %sext
43 %sext = sext <16 x i1> %cmp to <16 x i8>
44 ret <16 x i8> %sext
52 %sext = sext <16 x i1> %cmp to <16 x i8>
53 ret <16 x i8> %sext
[all …]
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| /external/llvm-project/llvm/test/Transforms/InstSimplify/ |
| D | cmp_ext.ll | 6 ; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
11 %sext = sext i32 %x to i64
13 %cmp = icmp uge i64 %zext, %sext
21 %sext = sext i32 %x to i64
23 %cmp = icmp ugt i64 %zext, %sext
29 ; CHECK-NEXT: [[SEXT:%.*]] = sext i32 [[X:%.*]] to i64
34 %sext = sext i32 %x to i64
36 %cmp = icmp ult i64 %zext, %sext
44 %sext = sext i32 %x to i64
46 %cmp = icmp ule i64 %zext, %sext
[all …]
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| /external/llvm/test/CodeGen/X86/ |
| D | setcc-combine.ll | 10 %sext = sext <4 x i1> %cmp to <4 x i32>
11 %cmp1 = icmp eq <4 x i32> %sext, zeroinitializer
13 %1 = sext i1 %0 to i32
24 %sext = sext <4 x i1> %cmp to <4 x i32>
25 %cmp1 = icmp ne <4 x i32> %sext, zeroinitializer
27 %1 = sext i1 %0 to i32
37 %sext = sext <4 x i1> %cmp to <4 x i32>
38 %cmp1 = icmp sle <4 x i32> %sext, zeroinitializer
40 %1 = sext i1 %0 to i32
51 %sext = sext <4 x i1> %cmp to <4 x i32>
[all …]
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| D | pmovsx-inreg.ll | 10 %sext = sext <2 x i8> %wide.load35 to <2 x i64>
12 store <2 x i64> %sext, <2 x i64>* %out, align 8
27 %sext = sext <4 x i8> %wide.load35 to <4 x i64>
29 store <4 x i64> %sext, <4 x i64>* %out, align 8
38 %sext = sext <4 x i8> %wide.load35 to <4 x i32>
40 store <4 x i32> %sext, <4 x i32>* %out, align 8
55 %sext = sext <8 x i8> %wide.load35 to <8 x i32>
57 store <8 x i32> %sext, <8 x i32>* %out, align 8
66 %sext = sext <8 x i8> %wide.load35 to <8 x i16>
68 store <8 x i16> %sext, <8 x i16>* %out, align 8
[all …]
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| /external/swiftshader/third_party/subzero/crosstest/ |
| D | test_icmp_i1vec.ll | 6 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
7 ret <16 x i8> %cmp.sext
15 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
16 ret <16 x i8> %cmp.sext
24 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
25 ret <16 x i8> %cmp.sext
33 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
34 ret <16 x i8> %cmp.sext
42 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
43 ret <16 x i8> %cmp.sext
[all …]
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| /external/llvm-project/llvm/test/Analysis/ScalarEvolution/ |
| D | umin-umax-folds.ll | 10 ; CHECK-NEXT: %len.sext = sext i32 %len to i64
11 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648)
27 %len.sext = sext i32 %len to i64
33 %cmp2 = icmp ult i64 %iv, %len.sext
45 ; CHECK-NEXT: %len.sext = sext i32 %len to i64
46 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648)
51 ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext
62 %len.sext = sext i32 %len to i64
67 %cmp1 = icmp ule i64 %len.zext, %len.sext
68 %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext
[all …]
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| D | infer-prestart-no-wrap.ll | 4 define void @infer.sext.0(i1* %c, i32 %start, i32* %buf) {
5 ; CHECK-LABEL: Classifying expressions for: @infer.sext.0
13 %idx.inc.sext = sext i32 %idx.inc to i64
14 ; CHECK: %idx.inc.sext = sext i32 %idx.inc to i64
15 ; CHECK-NEXT: --> {(1 + (sext i32 %start to i64))<nsw>,+,1}<nsw><%loop>
37 %idx.inc.sext = zext i32 %idx.inc to i64
38 ; CHECK: %idx.inc.sext = zext i32 %idx.inc to i64
52 define void @infer.sext.1(i32 %start, i1* %c) {
53 ; CHECK-LABEL: Classifying expressions for: @infer.sext.1
61 %idx.sext = sext i32 %idx to i64
[all …]
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| /external/llvm/test/Analysis/BasicAA/ |
| D | q.bad.ll | 8 %sext.1 = sext i8 255 to i16
9 %sext.zext.1 = zext i16 %sext.1 to i64
10 %sext.2 = sext i8 255 to i32
11 %sext.zext.2 = zext i32 %sext.2 to i64
12 %a = getelementptr inbounds i8, i8* %mem, i64 %sext.zext.1
13 %b = getelementptr inbounds i8, i8* %mem, i64 %sext.zext.2
19 ; %a and %b only PartialAlias as, although they're both zext(sext(%num)) they'll extend the sign by…
22 %sext.1 = sext i8 %num to i16
23 %sext.zext.1 = zext i16 %sext.1 to i64
24 %sext.2 = sext i8 %num to i32
[all …]
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| /external/llvm-project/llvm/test/Analysis/BasicAA/ |
| D | q.bad.ll | 8 %sext.1 = sext i8 255 to i16
9 %sext.zext.1 = zext i16 %sext.1 to i64
10 %sext.2 = sext i8 255 to i32
11 %sext.zext.2 = zext i32 %sext.2 to i64
12 %a = getelementptr inbounds i8, i8* %mem, i64 %sext.zext.1
13 %b = getelementptr inbounds i8, i8* %mem, i64 %sext.zext.2
19 ; %a and %b only PartialAlias as, although they're both zext(sext(%num)) they'll extend the sign by…
22 %sext.1 = sext i8 %num to i16
23 %sext.zext.1 = zext i16 %sext.1 to i64
24 %sext.2 = sext i8 %num to i32
[all …]
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.amdgcn.class.ll | 19 %sext = sext i1 %result to i32
20 store i32 %sext, i32 addrspace(1)* %out, align 4
35 %sext = sext i1 %result to i32
36 store i32 %sext, i32 addrspace(1)* %out, align 4
51 %sext = sext i1 %result to i32
52 store i32 %sext, i32 addrspace(1)* %out, align 4
68 %sext = sext i1 %result to i32
69 store i32 %sext, i32 addrspace(1)* %out, align 4
81 %sext = sext i1 %result to i32
82 store i32 %sext, i32 addrspace(1)* %out, align 4
[all …]
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| /external/llvm-project/llvm/test/Transforms/InstCombine/ |
| D | narrow-math.ll | 13 ; CHECK-NEXT: [[F:%.*]] = sext i32 [[NARROW]] to i64
18 %D = sext i32 %B to i64
19 %E = sext i32 %C to i64
30 ; CHECK-NEXT: [[D:%.*]] = sext i32 [[B]] to i64
37 %D = sext i32 %B to i64
49 ; CHECK-NEXT: [[D:%.*]] = sext i16 [[B]] to i64
50 ; CHECK-NEXT: [[E:%.*]] = sext i32 [[C]] to i64
56 %D = sext i16 %B to i64
57 %E = sext i32 %C to i64
66 ; CHECK-NEXT: [[D:%.*]] = sext i32 [[B]] to i64
[all …]
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| /external/llvm/test/Analysis/ScalarEvolution/ |
| D | infer-prestart-no-wrap.ll | 3 define void @infer.sext.0(i1* %c, i32 %start, i32* %buf) {
4 ; CHECK-LABEL: Classifying expressions for: @infer.sext.0
12 %idx.inc.sext = sext i32 %idx.inc to i64
13 ; CHECK: %idx.inc.sext = sext i32 %idx.inc to i64
14 ; CHECK-NEXT: --> {(1 + (sext i32 %start to i64))<nsw>,+,1}<nsw><%loop>
36 %idx.inc.sext = zext i32 %idx.inc to i64
37 ; CHECK: %idx.inc.sext = zext i32 %idx.inc to i64
51 define void @infer.sext.1(i32 %start, i1* %c) {
52 ; CHECK-LABEL: Classifying expressions for: @infer.sext.1
60 %idx.sext = sext i32 %idx to i64
[all …]
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| /external/llvm/test/Transforms/InstCombine/ |
| D | sext.ll | 11 %s = sext i32 %t to i64
20 %s = sext i32 %t to i64
29 %s = sext i32 %t to i64
38 %s = sext i32 %t to i64
47 %s = sext i32 %t to i64
56 %s = sext i32 %t to i64
65 %s = sext i32 %u to i64
75 %n = sext i16 %s to i32
88 %t2 = sext i16 %t to i32
109 %b = sext i8 %a to i32
[all …]
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| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.amdgcn.class.ll | 19 %sext = sext i1 %result to i32
20 store i32 %sext, i32 addrspace(1)* %out, align 4
35 %sext = sext i1 %result to i32
36 store i32 %sext, i32 addrspace(1)* %out, align 4
51 %sext = sext i1 %result to i32
52 store i32 %sext, i32 addrspace(1)* %out, align 4
68 %sext = sext i1 %result to i32
69 store i32 %sext, i32 addrspace(1)* %out, align 4
81 %sext = sext i1 %result to i32
82 store i32 %sext, i32 addrspace(1)* %out, align 4
[all …]
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| D | fcmp.f16.ll | 22 %r.val.sext = sext i1 %r.val to i32
23 store i32 %r.val.sext, i32 addrspace(1)* %r
50 %r.val.sext = sext i1 %r.val to i32
51 store i32 %r.val.sext, i32 addrspace(1)* %r
73 %r.val.sext = sext i1 %r.val to i32
74 store i32 %r.val.sext, i32 addrspace(1)* %r
96 %r.val.sext = sext i1 %r.val to i32
97 store i32 %r.val.sext, i32 addrspace(1)* %r
119 %r.val.sext = sext i1 %r.val to i32
120 store i32 %r.val.sext, i32 addrspace(1)* %r
[all …]
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| /external/llvm-project/llvm/test/Transforms/SCCP/ |
| D | ip-ranges-sext.ll | 9 ; CHECK-NEXT: [[EXT_1:%.*]] = sext i32 [[X]] to i64
12 ; CHECK-NEXT: [[EXT_2:%.*]] = sext i32 [[X]] to i64
19 %ext.1 = sext i32 %x to i64
23 %ext.2 = sext i32 %x to i64
32 ; CHECK-NEXT: [[EXT_1:%.*]] = sext i32 [[X]] to i64
35 ; CHECK-NEXT: [[EXT_2:%.*]] = sext i32 [[X]] to i64
42 %ext.1 = sext i32 %x to i64
46 %ext.2 = sext i32 %x to i64
56 ; CHECK-NEXT: [[EXT_1:%.*]] = sext i32 [[X]] to i64
59 ; CHECK-NEXT: [[EXT_2:%.*]] = sext i32 [[X]] to i64
[all …]
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| /external/llvm/test/Analysis/Delinearization/ |
| D | himeno_2.ll | 29 …sext i32 %a.deps to i64) * (1 + (sext i32 %a.cols to i64))) + %a.base),+,(4 * (sext i32 %a.deps to…
31 ; CHECK: ArrayDecl[UnknownSize][(sext i32 %a.cols to i64)][(sext i32 %a.deps to i64)] with elements…
41 %p.rows.sext = sext i32 %p.rows.sub to i64
45 %p.cols.sext = sext i32 %p.cols.sub to i64
49 %p.deps.sext = sext i32 %p.deps.sub to i64
52 %a.cols.sext = sext i32 %a.cols to i64
55 %a.deps.sext = sext i32 %a.deps to i64
70 %tmp1 = mul nsw i64 %a.cols.sext, %i
72 %tmp3 = mul i64 %tmp2, %a.deps.sext
77 %k.exitcond = icmp eq i64 %k.inc, %p.deps.sext
[all …]
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| D | himeno_1.ll | 29 …sext i32 %a.deps to i64) * (1 + (sext i32 %a.cols to i64))) + %a.base),+,(4 * (sext i32 %a.deps to…
31 ; CHECK: ArrayDecl[UnknownSize][(sext i32 %a.cols to i64)][(sext i32 %a.deps to i64)] with elements…
41 %p.rows.sext = sext i32 %p.rows.sub to i64
45 %p.cols.sext = sext i32 %p.cols.sub to i64
49 %p.deps.sext = sext i32 %p.deps.sub to i64
64 %a.cols.sext = sext i32 %a.cols to i64
65 %a.deps.sext = sext i32 %a.deps to i64
70 %tmp1 = mul nsw i64 %a.cols.sext, %i
72 %tmp3 = mul i64 %tmp2, %a.deps.sext
77 %k.exitcond = icmp eq i64 %k.inc, %p.deps.sext
[all …]
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