| /external/llvm/test/CodeGen/ARM/ |
| D | rotate.ll | 4 ;; select ROTL. Make sure if generates the basic VSHL/VSHR.
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | rotate.ll | 4 ;; select ROTL. Make sure if generates the basic ushr/shl.
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | rotate.ll | 4 ;; select ROTL. Make sure if generates the basic ushr/shl.
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | rotate.ll | 5 ;; select ROTL. Make sure if generates the basic VSHL/VSHR.
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 178 SDValue ROTL = DAG.getNode(ISD::ROTL, DL, MVT::i32, SRL, in addIPMSequence() local
180 return ROTL; in addIPMSequence()
|
| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | rotl-rotr.ll | 5 ; These IR sequences will generate ISD::ROTL and ISD::ROTR nodes, that the
|
| /external/rust/crates/quiche/deps/boringssl/src/decrepit/cast/ |
| D | cast.c | 88 #define ROTL(a, n) (_lrotl(a, n)) macro
90 #define ROTL(a, n) ((((a) << (n)) | ((a) >> ((-(n))&31))) & 0xffffffffL) macro
97 t = ROTL(t, (key[n * 2 + 1])); \
|
| /external/boringssl/src/decrepit/cast/ |
| D | cast.c | 88 #define ROTL(a, n) (_lrotl(a, n)) macro
90 #define ROTL(a, n) ((((a) << (n)) | ((a) >> ((-(n))&31))) & 0xffffffffL) macro
97 t = ROTL(t, (key[n * 2 + 1])); \
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 2294 { ISD::ROTL, MVT::v8i64, 1 }, in getIntrinsicInstrCost()
2295 { ISD::ROTL, MVT::v4i64, 1 }, in getIntrinsicInstrCost()
2296 { ISD::ROTL, MVT::v2i64, 1 }, in getIntrinsicInstrCost()
2297 { ISD::ROTL, MVT::v16i32, 1 }, in getIntrinsicInstrCost()
2298 { ISD::ROTL, MVT::v8i32, 1 }, in getIntrinsicInstrCost()
2299 { ISD::ROTL, MVT::v4i32, 1 }, in getIntrinsicInstrCost()
2309 { ISD::ROTL, MVT::v4i64, 4 }, in getIntrinsicInstrCost()
2310 { ISD::ROTL, MVT::v8i32, 4 }, in getIntrinsicInstrCost()
2311 { ISD::ROTL, MVT::v16i16, 4 }, in getIntrinsicInstrCost()
2312 { ISD::ROTL, MVT::v32i8, 4 }, in getIntrinsicInstrCost()
[all …]
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 339 SHL, SRA, SRL, ROTL, ROTR, enumerator
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 2915 { ISD::ROTL, MVT::v8i64, 1 }, in getIntrinsicInstrCost()
2916 { ISD::ROTL, MVT::v4i64, 1 }, in getIntrinsicInstrCost()
2917 { ISD::ROTL, MVT::v2i64, 1 }, in getIntrinsicInstrCost()
2918 { ISD::ROTL, MVT::v16i32, 1 }, in getIntrinsicInstrCost()
2919 { ISD::ROTL, MVT::v8i32, 1 }, in getIntrinsicInstrCost()
2920 { ISD::ROTL, MVT::v4i32, 1 }, in getIntrinsicInstrCost()
2930 { ISD::ROTL, MVT::v4i64, 4 }, in getIntrinsicInstrCost()
2931 { ISD::ROTL, MVT::v8i32, 4 }, in getIntrinsicInstrCost()
2932 { ISD::ROTL, MVT::v16i16, 4 }, in getIntrinsicInstrCost()
2933 { ISD::ROTL, MVT::v32i8, 4 }, in getIntrinsicInstrCost()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 471 SHL, SRA, SRL, ROTL, ROTR, FSHL, FSHR, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 609 ROTL, enumerator
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 39 defm ROTL : BinaryInt<rotl, "rotl">;
|
| /external/vboot_reference/firmware/2lib/ |
| D | 2sha256.c | 44 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| D | 2sha512.c | 44 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 91 setOperationAction(ISD::ROTL, MVT::i8, Custom); in AVRTargetLowering()
92 setOperationAction(ISD::ROTL, MVT::i16, Expand); in AVRTargetLowering()
297 case ISD::ROTL: in LowerShifts()
316 case ISD::ROTL: in LowerShifts()
690 case ISD::ROTL: in LowerOperation()
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 92 setOperationAction(ISD::ROTL, MVT::i8, Custom); in AVRTargetLowering()
93 setOperationAction(ISD::ROTL, MVT::i16, Expand); in AVRTargetLowering()
292 case ISD::ROTL: { in LowerShifts()
319 case ISD::ROTL: in LowerShifts()
689 case ISD::ROTL: in LowerOperation()
|
| /external/avb/libavb/sha/ |
| D | sha512_impl.c | 44 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| D | sha256_impl.c | 44 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| /external/vboot_reference/firmware/lib/cryptolib/ |
| D | sha256.c | 45 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| D | sha512.c | 45 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) macro
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 69 defm ROTL : BinaryInt<rotl, "rotl", 0x77, 0x89>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 69 defm ROTL : BinaryInt<rotl, "rotl", 0x77, 0x89>;
|
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 1218 X86_INTRINSIC_DATA(avx512_mask_prolv_d_128, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
1219 X86_INTRINSIC_DATA(avx512_mask_prolv_d_256, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
1220 X86_INTRINSIC_DATA(avx512_mask_prolv_d_512, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
1221 X86_INTRINSIC_DATA(avx512_mask_prolv_q_128, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
1222 X86_INTRINSIC_DATA(avx512_mask_prolv_q_256, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
1223 X86_INTRINSIC_DATA(avx512_mask_prolv_q_512, INTR_TYPE_2OP_MASK, ISD::ROTL, 0),
|