| /art/compiler/dex/quick/mips/ |
| D | assemble_mips.cc | 460 void MipsMir2Lir::ConvertShortToLongBranch(LIR* lir) { in ConvertShortToLongBranch()
516 LIR *lir; in AssembleInstructions() local
712 size_t MipsMir2Lir::GetInsnSize(LIR* lir) { in GetInsnSize()
720 LIR* lir; in AssignInsnOffsets() local
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| D | target_mips.cc | 146 void MipsMir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags, in SetupTargetResourceMasks()
194 std::string MipsMir2Lir::BuildInsnString(const char *fmt, LIR *lir, unsigned char* base_addr) { in BuildInsnString()
558 bool MipsMir2Lir::IsUnconditionalBranch(LIR* lir) { in IsUnconditionalBranch()
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| /art/compiler/dex/quick/arm64/ |
| D | assemble_arm64.cc | 652 uint8_t* Arm64Mir2Lir::EncodeLIRs(uint8_t* write_pos, LIR* lir) { in EncodeLIRs()
815 LIR* lir; in AssembleLIR() local
953 size_t Arm64Mir2Lir::GetInsnSize(LIR* lir) { in GetInsnSize()
964 for (LIR* lir = head_lir; lir != end_lir; lir = NEXT_LIR(lir)) { in LinkFixupInsns() local
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| D | target_arm64.cc | 166 void Arm64Mir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags, in SetupTargetResourceMasks()
335 std::string Arm64Mir2Lir::BuildInsnString(const char* fmt, LIR* lir, unsigned char* base_addr) { in BuildInsnString()
566 bool Arm64Mir2Lir::IsUnconditionalBranch(LIR* lir) { in IsUnconditionalBranch()
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| D | utility_arm64.cc | 90 size_t Arm64Mir2Lir::GetLoadStoreSize(LIR* lir) { in GetLoadStoreSize()
99 size_t Arm64Mir2Lir::GetInstructionOffset(LIR* lir) { in GetInstructionOffset()
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| /art/compiler/dex/quick/arm/ |
| D | assemble_arm.cc | 1070 uint8_t* ArmMir2Lir::EncodeLIRs(uint8_t* write_pos, LIR* lir) { in EncodeLIRs()
1211 LIR* lir; in AssembleLIR() local
1631 size_t ArmMir2Lir::GetInsnSize(LIR* lir) { in GetInsnSize()
1641 for (LIR* lir = head_lir; lir != end_lir; lir = NEXT_LIR(lir)) { in LinkFixupInsns() local
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| D | target_arm.cc | 162 void ArmMir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags, in SetupTargetResourceMasks()
353 std::string ArmMir2Lir::BuildInsnString(const char* fmt, LIR* lir, unsigned char* base_addr) { in BuildInsnString()
537 bool ArmMir2Lir::IsUnconditionalBranch(LIR* lir) { in IsUnconditionalBranch()
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| D | utility_arm.cc | 836 LIR* lir = nullptr; in LoadStoreUsingInsnWithOffsetImm8Shl2() local
1170 size_t ArmMir2Lir::GetInstructionOffset(LIR* lir) { in GetInstructionOffset()
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| /art/compiler/dex/quick/ |
| D | codegen_util.cc | 104 void Mir2Lir::UnlinkLIR(LIR* lir) { in UnlinkLIR()
124 void Mir2Lir::NopLIR(LIR* lir) { in NopLIR()
131 void Mir2Lir::SetMemRefType(LIR* lir, bool is_load, int mem_type) { in SetMemRefType()
171 void Mir2Lir::AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, in AnnotateDalvikRegAccess()
189 void Mir2Lir::DumpLIRInsn(LIR* lir, unsigned char* base_addr) { in DumpLIRInsn()
305 for (LIR* lir = first_lir_insn_; lir != nullptr; lir = lir->next) { in UpdateLIROffsets() local
602 static int AssignLiteralOffsetCommon(LIR* lir, CodeOffset offset) { in AssignLiteralOffsetCommon()
610 static int AssignLiteralPointerOffsetCommon(LIR* lir, CodeOffset offset, in AssignLiteralPointerOffsetCommon()
1144 void Mir2Lir::AppendLIR(LIR* lir) { in AppendLIR()
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| D | mir_to_lir-inl.h | 161 inline void Mir2Lir::SetupResourceMasks(LIR* lir) { in SetupResourceMasks()
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| D | local_optimizations.cc | 92 inline void Mir2Lir::EliminateLoad(LIR* lir, int reg_id) { in EliminateLoad()
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| D | mir_to_lir.cc | 1324 size_t Mir2Lir::GetInstructionOffset(LIR* lir) { in GetInstructionOffset()
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| D | mir_to_lir.h | 201 #define NEXT_LIR(lir) (lir->next) argument
202 #define PREV_LIR(lir) (lir->prev) argument
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| /art/compiler/dex/quick/x86/ |
| D | fp_x86.cc | 630 LIR *lir = NewLIR3(kX86And32MI, rs_rX86_SP.GetReg(), displacement, 0x7fffffff); in GenInlinedAbsFloat() local
694 LIR *lir = NewLIR3(kX86And32MI, rs_rX86_SP.GetReg(), displacement + HIWORD_OFFSET, 0x7fffffff); in GenInlinedAbsDouble() local
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| D | assemble_x86.cc | 675 size_t X86Mir2Lir::GetInsnSize(LIR* lir) { in GetInsnSize()
1584 void X86Mir2Lir::EmitUnimplemented(const X86EncodingMap* entry, LIR* lir) { in EmitUnimplemented()
1599 LIR *lir; in AssembleInstructions() local
1900 LIR* lir; in AssignInsnOffsets() local
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| D | int_x86.cc | 1615 LIR *lir = NewLIR3(x86op, cu_->target64 ? rl_dest.reg.GetReg() : rl_dest.reg.GetLowReg(), in GenLongRegOrMemOp() local
1650 LIR *lir = NewLIR3(x86op, r_base, displacement + LOWORD_OFFSET, in GenLongArith() local
2488 LIR *lir = NewLIR3(x86op, r_base, displacement + LOWORD_OFFSET, val); in GenLongImm() local
2520 LIR *lir = NewLIR3(x86op, r_base, displacement + LOWORD_OFFSET, val_lo); in GenLongImm() local
2528 LIR *lir = NewLIR3(x86op, r_base, displacement + HIWORD_OFFSET, val_hi); in GenLongImm() local
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| D | target_x86.cc | 253 void X86Mir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags, in SetupTargetResourceMasks()
333 std::string X86Mir2Lir::BuildInsnString(const char *fmt, LIR *lir, unsigned char* base_addr) { in BuildInsnString()
755 bool X86Mir2Lir::IsUnconditionalBranch(LIR* lir) { in IsUnconditionalBranch()
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