| /art/compiler/dex/quick/x86/ |
| D | fp_x86.cc | 282 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff); in GenConversion()
307 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff); in GenConversion()
668 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff); in GenInlinedAbsDouble()
672 LoadConstantWide(sign_mask, 0x7fffffffffffffff); in GenInlinedAbsDouble()
732 LoadConstantWide(rl_result.reg, INT64_C(0x7ff8000000000000)); in GenInlinedMinMaxFP()
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| D | int_x86.cc | 463 LoadConstantWide(tmp, val); in GenFusedLongCmpImmBranch()
501 LoadConstantWide(tmp, val); in GenFusedLongCmpImmBranch()
1786 LoadConstantWide(rl_result.reg, 0); in GenDivRemLongLit()
1796 LoadConstantWide(rs_temp, 0x8000000000000000); in GenDivRemLongLit()
1811 LoadConstantWide(rl_result.reg, 0); in GenDivRemLongLit()
1822 LoadConstantWide(rl_result.reg, std::abs(imm) - 1); in GenDivRemLongLit()
1879 LoadConstantWide(rs_r2q, magic); in GenDivRemLongLit()
1919 LoadConstantWide(rs_temp, imm); in GenDivRemLongLit()
1981 LoadConstantWide(rs_r6q, 0x8000000000000000); in GenDivRemLong()
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| D | utility_x86.cc | 560 LIR* X86Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::X86Mir2Lir
612 res = LoadConstantWide(r_temp, value); in LoadConstantWide()
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| D | codegen_x86.h | 77 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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| /art/compiler/dex/quick/arm64/ |
| D | utility_arm64.cc | 400 return LoadConstantWide(r_dest, value); in LoadConstantNoClobber()
456 LIR* Arm64Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::Arm64Mir2Lir
922 LoadConstantWide(r_scratch, value); in OpRegRegImm64()
970 res = LoadConstantWide(r_tmp, value); in OpRegImm64()
1261 LoadConstantWide(r_scratch, displacement); in LoadBaseDispBody()
1352 LoadConstantWide(r_scratch, displacement); in StoreBaseDispBody()
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| D | codegen_arm64.h | 84 LIR* LoadConstantWide(RegStorage r_dest, int64_t value) OVERRIDE;
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| D | int_arm64.cc | 488 LoadConstantWide(r_magic, magic_table[lit].magic64); in SmallLiteralDivRem64()
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| /art/compiler/dex/quick/arm/ |
| D | fp_arm.cc | 153 LoadConstantWide(tmp2, 0x41f0000000000000LL); in GenConversion()
178 LoadConstantWide(const_val, INT64_C(0x41f0000000000000)); in GenConversion()
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| D | codegen_arm.h | 40 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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| D | utility_arm.cc | 641 LIR* ArmMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::ArmMir2Lir
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| /art/compiler/dex/quick/mips/ |
| D | codegen_mips.h | 40 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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| D | utility_mips.cc | 344 LIR* MipsMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) { in LoadConstantWide() function in art::MipsMir2Lir
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| /art/compiler/dex/quick/ |
| D | gen_loadstore.cc | 124 LoadConstantWide(r_dest, mir_graph_->ConstantValueWide(rl_src)); in LoadValueDirectWide()
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| D | mir_to_lir.cc | 526 LoadConstantWide(rl_result.reg, static_cast<int64_t>(vB) << 48); in CompileDalvikInstruction()
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| D | mir_to_lir.h | 1154 virtual LIR* LoadConstantWide(RegStorage r_dest, int64_t value) = 0;
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| D | gen_common.cc | 2040 LoadConstantWide(rl_result.reg, value); in GenConstWide()
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