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Searched refs:def_mask (Results 1 – 20 of 20) sorted by relevance

/art/compiler/dex/quick/
Dmir_to_lir-inl.h60 insn->u.m.use_mask = insn->u.m.def_mask = &kEncodeAll; in RawLIR()
165 lir->u.m.use_mask = lir->u.m.def_mask = &kEncodeNone; in SetupResourceMasks()
185 ResourceMask def_mask; in SetupResourceMasks() local
198 def_mask.SetBit(mem_ref_type_); in SetupResourceMasks()
207 lir->u.m.def_mask = lir->u.m.use_mask = &kEncodeAll; in SetupResourceMasks()
212 SetupRegMask(&def_mask, lir->operands[0]); in SetupResourceMasks()
216 SetupRegMask(&def_mask, lir->operands[1]); in SetupResourceMasks()
220 SetupRegMask(&def_mask, lir->operands[2]); in SetupResourceMasks()
244 def_mask.SetBit(ResourceMask::kCCode); in SetupResourceMasks()
252 SetupTargetResourceMasks(lir, flags, &use_mask, &def_mask); in SetupResourceMasks()
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Dlocal_optimizations.cc24 #define LOAD_STORE_CHECK_REG_DEP(mask, check) (mask.Intersects(*check->u.m.def_mask))
28 (use.Union(def).Intersects(*check->u.m.def_mask))
178 *this_lir->u.m.def_mask)); in ApplyLoadStoreElimination()
187 if (this_lir->u.m.def_mask->Intersects(*this_lir->u.m.use_mask)) { in ApplyLoadStoreElimination()
191 ResourceMask stop_def_reg_mask = this_lir->u.m.def_mask->Without(kEncodeMem); in ApplyLoadStoreElimination()
196 if (uses_pc.Intersects(this_lir->u.m.use_mask->Union(*this_lir->u.m.def_mask))) { in ApplyLoadStoreElimination()
214 if (uses_pc.Intersects(check_lir->u.m.use_mask->Union(*check_lir->u.m.def_mask))) { in ApplyLoadStoreElimination()
219 *check_lir->u.m.def_mask)); in ApplyLoadStoreElimination()
363 ResourceMask stop_def_reg_mask = this_lir->u.m.def_mask->Without(kEncodeMem); in ApplyLoadHoisting()
378 ResourceMask check_mem_mask = check_lir->u.m.def_mask->Intersection(kEncodeMem); in ApplyLoadHoisting()
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Dcodegen_util.cc84 inst->u.m.def_mask = &kEncodeAll; in MarkSafepointPC()
86 DCHECK(safepoint_pc->u.m.def_mask->Equals(kEncodeAll)); in MarkSafepointPC()
91 after->u.m.def_mask = &kEncodeAll; in MarkSafepointPCAfter()
100 DCHECK(safepoint_pc->u.m.def_mask->Equals(kEncodeAll)); in MarkSafepointPCAfter()
140 mask_ptr = &lir->u.m.def_mask; in SetMemRefType()
173 DCHECK((is_load ? lir->u.m.use_mask : lir->u.m.def_mask)->Intersection(kEncodeMem).Equals( in AnnotateDalvikRegAccess()
271 if (lir->u.m.def_mask && (!lir->flags.is_nop || dump_nop)) { in DumpLIRInsn()
272 DUMP_RESOURCE_MASK(DumpResourceMask(lir, *lir->u.m.def_mask, "def")); in DumpLIRInsn()
841 new_label->u.m.def_mask = &kEncodeAll; in InsertCaseLabel()
Dgen_invoke.cc961 ld->u.m.def_mask = &kEncodeAll; in GenDalvikArgsRange()
972 st->u.m.def_mask = &kEncodeAll; in GenDalvikArgsRange()
1048 ld1->u.m.def_mask = &kEncodeAll; in GenDalvikArgsRange()
1059 st1->u.m.def_mask = &kEncodeAll; in GenDalvikArgsRange()
1207 if (or_inst->u.m.def_mask->HasBit(ResourceMask::kCCode)) { in GenInlinedReferenceGetReferent()
Dmir_to_lir.h161 const ResourceMask* def_mask; // Resource mask for def. member
1242 ResourceMask* use_mask, ResourceMask* def_mask) = 0;
Dmir_to_lir.cc1175 head_lir->u.m.def_mask = &kEncodeAll; in MethodBlockCodeGen()
Dgen_common.cc48 barrier->u.m.def_mask = &kEncodeAll; in GenBarrier()
/art/compiler/dex/quick/arm/
Dtarget_arm.cc163 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument
174 def_mask->SetBit(kArmRegSP); in SetupTargetResourceMasks()
182 def_mask->SetBits(EncodeArmRegList(lir->operands[0])); in SetupTargetResourceMasks()
186 def_mask->SetBits(EncodeArmRegList(lir->operands[1])); in SetupTargetResourceMasks()
190 def_mask->SetBits(EncodeArmRegList(lir->operands[0])); in SetupTargetResourceMasks()
195 SetupRegMask(def_mask, lir->operands[1] + i); in SetupTargetResourceMasks()
205 *def_mask = kEncodeAll; in SetupTargetResourceMasks()
231 } else if ((opcode == kThumbPop) && (def_mask->Intersects(r8Mask))) { in SetupTargetResourceMasks()
232 def_mask->ClearBits(r8Mask); in SetupTargetResourceMasks()
233 def_mask->SetBit(kArmRegPC);; in SetupTargetResourceMasks()
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Dint_arm.cc216 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32()
252 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect()
258 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect()
918 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
925 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
946 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
1105 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch()
1138 barrier->u.m.def_mask = &kEncodeAll; in GenMemBarrier()
Dcodegen_arm.h74 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;
Dcall_arm.cc89 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenLargeSparseSwitch()
/art/compiler/dex/quick/mips/
Dtarget_mips.cc147 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument
153 def_mask->SetBit(kMipsRegSP); in SetupTargetResourceMasks()
161 def_mask->SetBit(kMipsRegLR); in SetupTargetResourceMasks()
165 def_mask->SetBit(kMipsRegHI); in SetupTargetResourceMasks()
169 def_mask->SetBit(kMipsRegLO); in SetupTargetResourceMasks()
Dcodegen_mips.h74 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;
/art/compiler/dex/quick/x86/
Dtarget_x86.cc254 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument
264 def_mask->SetBit(kX86RegSP); in SetupTargetResourceMasks()
268 SetupRegMask(def_mask, rs_rAX.GetReg()); in SetupTargetResourceMasks()
272 SetupRegMask(def_mask, rs_rDX.GetReg()); in SetupTargetResourceMasks()
295 SetupRegMask(def_mask, rs_rDI.GetReg()); in SetupTargetResourceMasks()
300 def_mask->SetBit(kX86FPStack); in SetupTargetResourceMasks()
606 mem_barrier->u.m.def_mask = &kEncodeAll; in GenMemBarrier()
2716 ld1->u.m.def_mask = &kEncodeAll; in GenDalvikArgsRange()
2726 st1->u.m.def_mask = &kEncodeAll; in GenDalvikArgsRange()
Dcodegen_x86.h133 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;
Dassemble_x86.cc1633 DCHECK(lir->u.m.def_mask->Equals(kEncodeAll)); in AssembleInstructions()
1699 DCHECK(lir->u.m.def_mask->Equals(kEncodeAll)); in AssembleInstructions()
Dint_x86.cc252 DCHECK(!last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32()
/art/compiler/dex/quick/arm64/
Dtarget_arm64.cc167 ResourceMask* use_mask, ResourceMask* def_mask) { in SetupTargetResourceMasks() argument
175 def_mask->SetBit(kArm64RegSP); in SetupTargetResourceMasks()
183 def_mask->SetBit(kArm64RegLR); in SetupTargetResourceMasks()
Dint_arm64.cc770 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
774 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
948 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch()
987 barrier->u.m.def_mask = &kEncodeAll; in GenMemBarrier()
Dcodegen_arm64.h127 ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE;