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Searched refs:loc (Results 1 – 25 of 28) sorted by relevance

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/art/compiler/dex/quick/
Dralloc_util.cc821 void Mir2Lir::MarkLive(RegLocation loc) { in MarkLive() argument
822 RegStorage reg = loc.reg; in MarkLive()
826 int s_reg = loc.s_reg_low; in MarkLive()
853 if (loc.wide) { in MarkLive()
858 if (loc.wide) { in MarkLive()
909 void Mir2Lir::MarkClean(RegLocation loc) { in MarkClean() argument
910 if (loc.reg.IsPair()) { in MarkClean()
911 RegisterInfo* info = GetRegInfo(loc.reg.GetLow()); in MarkClean()
913 info = GetRegInfo(loc.reg.GetHigh()); in MarkClean()
916 RegisterInfo* info = GetRegInfo(loc.reg); in MarkClean()
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Dgen_loadstore.cc388 RegLocation Mir2Lir::ForceTemp(RegLocation loc) { in ForceTemp() argument
389 DCHECK(!loc.wide); in ForceTemp()
390 DCHECK(loc.location == kLocPhysReg); in ForceTemp()
391 DCHECK(!loc.reg.IsFloat()); in ForceTemp()
392 if (IsTemp(loc.reg)) { in ForceTemp()
393 Clobber(loc.reg); in ForceTemp()
396 OpRegCopy(temp_low, loc.reg); in ForceTemp()
397 loc.reg = temp_low; in ForceTemp()
401 loc.s_reg_low = INVALID_SREG; in ForceTemp()
402 return loc; in ForceTemp()
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Dcodegen_util.cc1286 RegLocation Mir2Lir::NarrowRegLoc(RegLocation loc) { in NarrowRegLoc() argument
1287 if (loc.location == kLocPhysReg) { in NarrowRegLoc()
1288 DCHECK(!loc.reg.Is32Bit()); in NarrowRegLoc()
1289 if (loc.reg.IsPair()) { in NarrowRegLoc()
1290 RegisterInfo* info_lo = GetRegInfo(loc.reg.GetLow()); in NarrowRegLoc()
1291 RegisterInfo* info_hi = GetRegInfo(loc.reg.GetHigh()); in NarrowRegLoc()
1294 loc.reg = info_lo->GetReg(); in NarrowRegLoc()
1296 RegisterInfo* info = GetRegInfo(loc.reg); in NarrowRegLoc()
1299 if (info->IsLive() && (info->SReg() == loc.s_reg_low)) { in NarrowRegLoc()
1301 info_new->MarkLive(loc.s_reg_low); in NarrowRegLoc()
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Dmir_to_lir.h660 RegisterClass LocToRegClass(RegLocation loc);
719 virtual RegLocation NarrowRegLoc(RegLocation loc);
778 void MarkLive(RegLocation loc);
783 void MarkClean(RegLocation loc);
784 void MarkDirty(RegLocation loc);
787 virtual RegLocation UpdateLoc(RegLocation loc);
788 virtual RegLocation UpdateLocWide(RegLocation loc);
789 RegLocation UpdateRawLoc(RegLocation loc);
799 virtual RegLocation EvalLocWide(RegLocation loc, int reg_class, bool update);
808 virtual RegLocation EvalLoc(RegLocation loc, int reg_class, bool update);
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Dgen_invoke.cc921 RegLocation loc = info->args[next_arg]; in GenDalvikArgsRange() local
922 if (loc.wide) { in GenDalvikArgsRange()
923 loc = UpdateLocWide(loc); in GenDalvikArgsRange()
924 if ((next_arg >= 2) && (loc.location == kLocPhysReg)) { in GenDalvikArgsRange()
926 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); in GenDalvikArgsRange()
930 loc = UpdateLoc(loc); in GenDalvikArgsRange()
931 if ((next_arg >= 3) && (loc.location == kLocPhysReg)) { in GenDalvikArgsRange()
933 Store32Disp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg); in GenDalvikArgsRange()
Dmir_to_lir.cc42 RegisterClass Mir2Lir::LocToRegClass(RegLocation loc) { in LocToRegClass() argument
44 if (loc.fp) { in LocToRegClass()
45 DCHECK(!loc.ref) << "At most, one of ref/fp may be set"; in LocToRegClass()
47 } else if (loc.ref) { in LocToRegClass()
Dgen_common.cc431 RegLocation loc = UpdateLoc(info->args[i]); in GenFilledNewArray() local
432 if (loc.location == kLocPhysReg) { in GenFilledNewArray()
434 Store32Disp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg); in GenFilledNewArray()
/art/compiler/optimizing/
Dcode_generator.cc156 Location loc = locations->InAt(i); in AllocateRegistersLocally() local
157 if (loc.IsRegister()) { in AllocateRegistersLocally()
159 DCHECK(!blocked_registers_[loc.GetEncoding()]); in AllocateRegistersLocally()
160 blocked_registers_[loc.GetEncoding()] = true; in AllocateRegistersLocally()
165 Location loc = locations->GetTemp(i); in AllocateRegistersLocally() local
166 if (loc.IsRegister()) { in AllocateRegistersLocally()
168 DCHECK(!blocked_registers_[loc.GetEncoding()]); in AllocateRegistersLocally()
169 blocked_registers_[loc.GetEncoding()] = true; in AllocateRegistersLocally()
177 Location loc = locations->InAt(i); in AllocateRegistersLocally() local
179 if (loc.IsUnallocated()) { in AllocateRegistersLocally()
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Dlocations.h124 Location loc(kStackSlot, payload); in StackSlot()
126 DCHECK_EQ(loc.GetStackIndex(), stack_index); in StackSlot()
127 return loc; in StackSlot()
136 Location loc(kDoubleStackSlot, payload); in DoubleStackSlot()
138 DCHECK_EQ(loc.GetStackIndex(), stack_index); in DoubleStackSlot()
139 return loc; in DoubleStackSlot()
Dparallel_move_resolver.cc150 bool ParallelMoveResolver::IsScratchLocation(Location loc) { in IsScratchLocation() argument
152 if (moves_.Get(i)->Blocks(loc)) { in IsScratchLocation()
158 if (moves_.Get(i)->GetDestination().Equals(loc)) { in IsScratchLocation()
Dparallel_move_resolver.h60 bool IsScratchLocation(Location loc);
/art/test/092-locale/src/
DMain.java146 Locale loc; in testIso3() local
147 loc = new Locale("en", "US"); in testIso3()
148 System.out.println("loc: " + loc); in testIso3()
149 System.out.println(" iso3=" + loc.getISO3Language()); in testIso3()
151 loc = new Locale("eng", "USA"); in testIso3()
152 System.out.println("loc: " + loc); in testIso3()
154 System.out.println(" iso3=" + loc.getISO3Language()); in testIso3()
/art/test/092-locale/
Dexpected.txt9 loc: en_US
11 loc: eng_USA
/art/compiler/dex/quick/x86/
Dutility_x86.cc1025 RegLocation X86Mir2Lir::UpdateLocTyped(RegLocation loc, int reg_class) { in UpdateLocTyped() argument
1026 loc = UpdateLoc(loc); in UpdateLocTyped()
1027 if ((loc.location == kLocPhysReg) && (loc.fp != loc.reg.IsFloat())) { in UpdateLocTyped()
1028 if (GetRegInfo(loc.reg)->IsTemp()) { in UpdateLocTyped()
1029 Clobber(loc.reg); in UpdateLocTyped()
1030 FreeTemp(loc.reg); in UpdateLocTyped()
1031 loc.reg = RegStorage::InvalidReg(); in UpdateLocTyped()
1032 loc.location = kLocDalvikFrame; in UpdateLocTyped()
1036 return loc; in UpdateLocTyped()
1039 RegLocation X86Mir2Lir::UpdateLocWideTyped(RegLocation loc, int reg_class) { in UpdateLocWideTyped() argument
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Dtarget_x86.cc934 void X86Mir2Lir::DumpRegLocation(RegLocation loc) { in DumpRegLocation() argument
935 LOG(INFO) << "location: " << loc.location << ',' in DumpRegLocation()
936 << (loc.wide ? " w" : " ") in DumpRegLocation()
937 << (loc.defined ? " D" : " ") in DumpRegLocation()
938 << (loc.is_const ? " c" : " ") in DumpRegLocation()
939 << (loc.fp ? " F" : " ") in DumpRegLocation()
940 << (loc.core ? " C" : " ") in DumpRegLocation()
941 << (loc.ref ? " r" : " ") in DumpRegLocation()
942 << (loc.high_word ? " h" : " ") in DumpRegLocation()
943 << (loc.home ? " H" : " ") in DumpRegLocation()
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Dcodegen_x86.h691 X86OpCode GetOpcode(Instruction::Code op, RegLocation loc, bool is_high_op, int32_t value);
847 RegLocation UpdateLocTyped(RegLocation loc, int reg_class);
848 RegLocation UpdateLocWideTyped(RegLocation loc, int reg_class);
957 static void DumpRegLocation(RegLocation loc);
/art/compiler/dex/quick/arm64/
Dtarget_arm64.cc858 static RegStorage GetArgPhysicalReg(RegLocation* loc, int* num_gpr_used, int* num_fpr_used, in GetArgPhysicalReg() argument
860 if (loc->fp) { in GetArgPhysicalReg()
865 if (loc->wide) { in GetArgPhysicalReg()
878 if (loc->wide || loc->ref) { in GetArgPhysicalReg()
1058 RegLocation loc = info->args[next_arg]; in GenDalvikArgsRange() local
1059 if (loc.wide) { in GenDalvikArgsRange()
1060 loc = UpdateLocWide(loc); in GenDalvikArgsRange()
1061 if (loc.location == kLocPhysReg) { in GenDalvikArgsRange()
1063 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); in GenDalvikArgsRange()
1067 loc = UpdateLoc(loc); in GenDalvikArgsRange()
[all …]
/art/compiler/dex/
Dvreg_analysis.cc441 RegLocation* loc = static_cast<RegLocation*>(arena_->Alloc(max_regs * sizeof(*loc), in InitRegLocations() local
444 loc[i] = fresh_loc; in InitRegLocations()
445 loc[i].s_reg_low = i; in InitRegLocations()
446 loc[i].is_const = is_constant_v_->IsBitSet(i); in InitRegLocations()
447 loc[i].wide = false; in InitRegLocations()
453 loc[ct->s_reg_low].location = kLocCompilerTemp; in InitRegLocations()
454 loc[ct->s_reg_low].defined = true; in InitRegLocations()
458 loc[GetMethodSReg()].ref = true; in InitRegLocations()
460 reg_location_ = loc; in InitRegLocations()
Dmir_graph.h713 bool IsConst(RegLocation loc) const { in IsConst() argument
714 return loc.orig_sreg < 0 ? false : IsConst(loc.orig_sreg); in IsConst()
717 int32_t ConstantValue(RegLocation loc) const { in ConstantValue() argument
718 DCHECK(IsConst(loc)); in ConstantValue()
719 return constant_values_[loc.orig_sreg]; in ConstantValue()
727 int64_t ConstantValueWide(RegLocation loc) const { in ConstantValueWide() argument
728 DCHECK(IsConst(loc)); in ConstantValueWide()
729 DCHECK(!loc.high_word); // Do not allow asking for the high partner. in ConstantValueWide()
730 DCHECK_LT(loc.orig_sreg + 1, GetNumSSARegs()); in ConstantValueWide()
731 return (static_cast<int64_t>(constant_values_[loc.orig_sreg + 1]) << 32) | in ConstantValueWide()
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Dlocal_value_numbering.cc80 uint16_t loc = gvn->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); in LookupMergeValue() local
81 auto lb = lvn->non_aliasing_ifield_value_map_.find(loc); in LookupMergeValue()
84 : gvn->LookupValue(kNonAliasingIFieldInitialOp, loc, kNoValue, kNoValue); in LookupMergeValue()
596 uint16_t loc; in IntersectAliasingValueLocations() local
598 loc = *store_it; in IntersectAliasingValueLocations()
601 loc = load_it->first; in IntersectAliasingValueLocations()
603 DCHECK(store_it == store_end || cmp(loc, *store_it)); in IntersectAliasingValueLocations()
605 while (work_it != work_end && cmp(work_it->first, loc)) { in IntersectAliasingValueLocations()
608 if (work_it != work_end && !cmp(loc, work_it->first)) { in IntersectAliasingValueLocations()
1157 uint16_t loc = gvn_->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); in HandleIGet() local
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/art/compiler/dex/portable/
Dmir_to_gbc.cc101 ::llvm::Type* MirConverter::LlvmTypeFromLocRec(RegLocation loc) { in LlvmTypeFromLocRec() argument
103 if (loc.wide) { in LlvmTypeFromLocRec()
104 if (loc.fp) in LlvmTypeFromLocRec()
109 if (loc.fp) { in LlvmTypeFromLocRec()
112 if (loc.ref) in LlvmTypeFromLocRec()
222 RegLocation loc) { in EmitConst() argument
224 if (loc.wide) { in EmitConst()
225 if (loc.fp) { in EmitConst()
231 if (loc.fp) { in EmitConst()
233 } else if (loc.ref) { in EmitConst()
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Dmir_to_gbc.h91 ::llvm::Type* LlvmTypeFromLocRec(RegLocation loc);
104 RegLocation loc);
107 RegLocation loc);
/art/runtime/jdwp/
Djdwp_event.h61 JdwpLocation loc; member
Djdwp_event.cc194 Dbg::WatchLocation(&pMod->locationOnly.loc, &req); in RegisterEvent()
273 Dbg::UnwatchLocation(&pMod->locationOnly.loc, &req); in UnregisterEvent()
501 if (!Dbg::MatchLocation(pMod->locationOnly.loc, *basket.pLoc)) { in ModsMatch()
/art/compiler/
Delf_patcher.cc181 uintptr_t loc = patch_ptr - (reinterpret_cast<uintptr_t>(oat_file_->Begin()) + in SetPatchLocation() local
185 CHECK_LT(loc, oat_file_->Size() - oat_header_->GetExecutableOffset()); in SetPatchLocation()
186 AddPatch(loc); in SetPatchLocation()

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