| /art/compiler/dex/quick/mips/ |
| D | utility_mips.cc | 131 LIR* MipsMir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) { in OpRegImm() argument
139 return OpRegRegImm(op, r_dest_src1, r_dest_src1, value); in OpRegImm()
142 return OpRegRegImm(op, r_dest_src1, r_dest_src1, value); in OpRegImm()
149 res = NewLIR2(opcode, r_dest_src1.GetReg(), abs_value); in OpRegImm()
154 NewLIR2(opcode, r_dest_src1.GetReg(), r_scratch.GetReg()); in OpRegImm()
156 NewLIR3(opcode, r_dest_src1.GetReg(), r_dest_src1.GetReg(), r_scratch.GetReg()); in OpRegImm()
285 LIR* MipsMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() argument
293 return NewLIR3(kMipsNor, r_dest_src1.GetReg(), r_src2.GetReg(), rZERO); in OpRegReg()
295 return NewLIR3(kMipsSubu, r_dest_src1.GetReg(), rZERO, r_src2.GetReg()); in OpRegReg()
302 return OpRegRegReg(op, r_dest_src1, r_dest_src1, r_src2); in OpRegReg()
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| D | codegen_mips.h | 149 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value);
150 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
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| /art/compiler/dex/quick/arm64/ |
| D | utility_arm64.cc | 566 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) { in OpRegRegShift() argument
567 ArmOpcode wide = (r_dest_src1.Is64Bit()) ? WIDE(0) : UNWIDE(0); in OpRegRegShift()
568 CHECK_EQ(r_dest_src1.Is64Bit(), r_src2.Is64Bit()); in OpRegRegShift()
593 return NewLIR2(kA64Rev2rr | wide, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegRegShift()
597 NewLIR2(kA64Rev162rr | wide, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegRegShift()
599 return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_dest_src1.GetReg(), 0, 15); in OpRegRegShift()
605 return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 7); in OpRegRegShift()
609 return NewLIR4(kA64Sbfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 15); in OpRegRegShift()
614 return NewLIR4(kA64Ubfm4rrdd | wide, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 15); in OpRegRegShift()
616 return OpRegRegRegShift(op, r_dest_src1, r_dest_src1, r_src2, shift); in OpRegRegShift()
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| D | codegen_arm64.h | 217 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value) OVERRIDE;
218 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
364 LIR* OpRegImm64(OpKind op, RegStorage r_dest_src1, int64_t value);
367 LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift);
372 LIR* OpRegRegExtend(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,
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| /art/compiler/dex/quick/arm/ |
| D | utility_arm.cc | 238 LIR* ArmMir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, in OpRegRegShift() argument
241 ((shift == 0) && r_dest_src1.Low8() && r_src2.Low8()); in OpRegRegShift()
260 else if ((shift == 0) && !r_dest_src1.Low8() && !r_src2.Low8()) in OpRegRegShift()
262 else if ((shift == 0) && r_dest_src1.Low8()) in OpRegRegShift()
274 if (r_dest_src1.Low8() && r_src2.Low8()) in OpRegRegShift()
276 else if (!r_dest_src1.Low8() && !r_src2.Low8()) in OpRegRegShift()
278 else if (r_dest_src1.Low8()) in OpRegRegShift()
329 return NewLIR3(kThumb2RevRR, r_dest_src1.GetReg(), r_src2.GetReg(), r_src2.GetReg()); in OpRegRegShift()
337 return NewLIR3(kThumb2RevshRR, r_dest_src1.GetReg(), r_src2.GetReg(), r_src2.GetReg()); in OpRegRegShift()
343 return NewLIR4(kThumb2Sbfx, r_dest_src1.GetReg(), r_src2.GetReg(), 0, 8); in OpRegRegShift()
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| D | codegen_arm.h | 152 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value);
153 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
168 LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift);
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| /art/compiler/dex/quick/x86/ |
| D | utility_x86.cc | 133 LIR* X86Mir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) { in OpRegImm() argument
136 DCHECK(!r_dest_src1.IsFloat()); in OpRegImm()
137 if (r_dest_src1.Is64Bit()) { in OpRegImm()
171 return NewLIR3(opcode, r_dest_src1.GetReg(), r_dest_src1.GetReg(), value); in OpRegImm()
192 return NewLIR2(opcode, r_dest_src1.GetReg(), value); in OpRegImm()
195 LIR* X86Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() argument
196 bool is64Bit = r_dest_src1.Is64Bit(); in OpRegReg()
202 OpRegCopy(r_dest_src1, r_src2); in OpRegReg()
203 return OpReg(kOpNot, r_dest_src1); in OpRegReg()
205 OpRegCopy(r_dest_src1, r_src2); in OpRegReg()
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| D | codegen_x86.h | 276 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value) OVERRIDE;
277 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
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| /art/compiler/dex/quick/ |
| D | mir_to_lir.h | 1400 virtual LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value) = 0;
1401 virtual LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) = 0;
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