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/art/compiler/dex/quick/mips/
Dcodegen_mips.h30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
87 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
93 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
95 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
97 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
101 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
109 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
186 void GenAddLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
188 void GenSubLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
Dfp_mips.cc24 void MipsMir2Lir::GenArithOpFloat(Instruction::Code opcode, in GenArithOpFloat()
70 void MipsMir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
116 void MipsMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, in GenConversion()
168 void MipsMir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, in GenCmpFP()
Dint_mips.cc374 bool MipsMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem()
395 void MipsMir2Lir::GenAddLong(Instruction::Code opcode, RegLocation rl_dest, in GenAddLong()
417 void MipsMir2Lir::GenSubLong(Instruction::Code opcode, RegLocation rl_dest, in GenSubLong()
439 void MipsMir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenArithOpLong()
630 void MipsMir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftImmOpLong()
636 void MipsMir2Lir::GenArithImmOpLong(Instruction::Code opcode, in GenArithImmOpLong()
DREADME.mips51 Code expansion
53 Code expansion for the MIPS target is significantly higher than we see
/art/runtime/quick/
Dinline_method_analyser.h155 static constexpr bool IsInstructionIGet(Instruction::Code opcode) { in IsInstructionIGet()
159 static constexpr bool IsInstructionIPut(Instruction::Code opcode) { in IsInstructionIPut()
163 static constexpr uint16_t IGetVariant(Instruction::Code opcode) { in IGetVariant()
167 static constexpr uint16_t IPutVariant(Instruction::Code opcode) { in IPutVariant()
Dinline_method_analyser.cc97 Instruction::Code opcode = instruction->Opcode(); in AnalyseMethodCode()
147 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseReturnMethod()
171 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseConstMethod()
203 Instruction::Code opcode = instruction->Opcode(); in AnalyseIGetMethod()
207 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseIGetMethod()
266 Instruction::Code opcode = instruction->Opcode(); in AnalyseIPutMethod()
270 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseIPutMethod()
/art/compiler/dex/quick/x86/
Dcodegen_x86.h67 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
151 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
153 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
155 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
157 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
170 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
172 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
174 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
178 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest,
188 bool GenLongImm(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
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Dint_x86.cc1241 bool X86Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem()
1295 void X86Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenArithOpLong()
1447 void X86Mir2Lir::GenMulLong(Instruction::Code, RegLocation rl_dest, RegLocation rl_src1, in GenMulLong() argument
1583 Instruction::Code op) { in GenLongRegOrMemOp()
1627 void X86Mir2Lir::GenLongArith(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op) { in GenLongArith()
1677 RegLocation rl_src2, Instruction::Code op, in GenLongArith()
1946 void X86Mir2Lir::GenDivRemLong(Instruction::Code, RegLocation rl_dest, RegLocation rl_src1, in GenDivRemLong() argument
2167 RegLocation X86Mir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftImmOpLong()
2252 void X86Mir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftImmOpLong()
2275 void X86Mir2Lir::GenArithImmOpLong(Instruction::Code opcode, in GenArithImmOpLong()
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Dfp_x86.cc24 void X86Mir2Lir::GenArithOpFloat(Instruction::Code opcode, in GenArithOpFloat()
75 void X86Mir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
193 void X86Mir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, in GenConversion()
448 void X86Mir2Lir::GenCmpFP(Instruction::Code code, RegLocation rl_dest, in GenCmpFP()
/art/runtime/
Ddex_instruction.h84 enum Code enum
232 static const char* Name(Code opcode) { in Name()
398 Code Opcode(uint16_t inst_data) const { in Opcode()
400 return static_cast<Code>(inst_data & 0xFF); in Opcode()
404 Code Opcode() const { in Opcode()
408 void SetOpcode(Code opcode) { in SetOpcode()
439 static Format FormatOf(Code opcode) { in FormatOf()
444 static int FlagsOf(Code opcode) { in FlagsOf()
449 static int VerifyFlagsOf(Code opcode) { in VerifyFlagsOf()
576 std::ostream& operator<<(std::ostream& os, const Instruction::Code& code);
Ddex_instruction.cc92 Code opcode = static_cast<Code>(insn & 0xFF); in CanFlowThrough()
385 std::ostream& operator<<(std::ostream& os, const Instruction::Code& code) { in operator <<()
/art/compiler/dex/quick/arm64/
Dcodegen_arm64.h66 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
68 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
70 bool HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div,
140 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
142 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
148 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
150 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
152 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
154 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
156 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
[all …]
Dfp_arm64.cc24 void Arm64Mir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpFloat()
66 void Arm64Mir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
119 void Arm64Mir2Lir::GenConversion(Instruction::Code opcode, in GenConversion()
251 void Arm64Mir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, in GenCmpFP()
Dint_arm64.cc63 void Arm64Mir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftOpLong()
403 bool Arm64Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem()
447 bool Arm64Mir2Lir::SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem64()
514 bool Arm64Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem()
521 bool Arm64Mir2Lir::HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem64()
1003 void Arm64Mir2Lir::GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest, in GenDivRemLong()
1050 void Arm64Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpLong()
1295 void Arm64Mir2Lir::GenShiftImmOpLong(Instruction::Code opcode, in GenShiftImmOpLong()
1327 void Arm64Mir2Lir::GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenArithImmOpLong()
/art/compiler/dex/quick/arm/
Dcodegen_arm.h30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
87 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
89 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
95 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
97 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
101 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
103 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
192 void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
Dfp_arm.cc23 void ArmMir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpFloat()
69 void ArmMir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
116 void ArmMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) { in GenConversion()
265 void ArmMir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, in GenCmpFP()
/art/compiler/dex/
Ddex_to_dex_compiler.cc75 Instruction::Code new_opcode, bool is_put);
84 Instruction::Code new_opcode, bool is_range);
205 Instruction::Code new_opcode, in CompileInstanceFieldAccess()
231 Instruction::Code new_opcode, in CompileInvokeVirtual()
Dpost_opt_passes.cc64 Instruction::Code opcode = mir->dalvikInsn.opcode; in Worker()
66 if (opcode == static_cast<Instruction::Code> (kMirOpPhi)) { in Worker()
Dmir_optimization.cc215 static constexpr bool IsInstructionIfCcZ(Instruction::Code opcode) { in IsInstructionIfCcZ()
219 static constexpr ConditionCode ConditionCodeForIfCcZ(Instruction::Code opcode) { in ConditionCodeForIfCcZ()
342 Instruction::Code opcode = mir->dalvikInsn.opcode; in BasicBlockOpt()
363 static_cast<Instruction::Code>(kMirOpFusedCmplFloat); in BasicBlockOpt()
367 static_cast<Instruction::Code>(kMirOpFusedCmplDouble); in BasicBlockOpt()
371 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat); in BasicBlockOpt()
375 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble); in BasicBlockOpt()
379 static_cast<Instruction::Code>(kMirOpFusedCmpLong); in BasicBlockOpt()
383 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in BasicBlockOpt()
482 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpSelect); in BasicBlockOpt()
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Dmir_graph.h261 static uint32_t GetStartUseIndex(Instruction::Code opcode);
280 Instruction::Code opcode;
291 static bool IsPseudoMirOp(Instruction::Code opcode) { in IsPseudoMirOp()
1028 static uint64_t GetDataFlowAttributes(Instruction::Code opcode);
Dmir_graph.cc641 insn->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpCheck); in ProcessCanThrow()
728 Instruction::Code opcode = insn->dalvikInsn.opcode; in InlineMethod()
855 LOG(INFO) << "-C- " << Instruction::Name(static_cast<Instruction::Code>(i)) in ShowOpcodeStats()
861 uint64_t MIRGraph::GetDataFlowAttributes(Instruction::Code opcode) { in GetDataFlowAttributes()
868 Instruction::Code opcode = mir->dalvikInsn.opcode; in GetDataFlowAttributes()
1461 move_result_mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in NewMemCallInfo()
1925 uint32_t SSARepresentation::GetStartUseIndex(Instruction::Code opcode) { in GetStartUseIndex()
/art/compiler/dex/quick/
Dmir_to_lir.h696 bool EvaluateBranch(Instruction::Code opcode, int src1, int src2);
821 virtual bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
841 void GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1,
843 void GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src,
846 void GenIntNarrowing(Instruction::Code opcode, RegLocation rl_dest,
870 virtual void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest,
872 void GenArithOpIntLit(Instruction::Code opcode, RegLocation rl_dest,
874 virtual void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest,
882 virtual void GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest,
1142 virtual bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
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Ddex_file_method_inliner.cc569 move_result->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInline()
741 Instruction::Code opcode = Instruction::MOVE_FROM16; in GenInlineReturnArg()
779 Instruction::Code opcode = static_cast<Instruction::Code>(Instruction::IGET + data.op_variant); in GenInlineIGet()
803 invoke->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInlineIGet()
831 Instruction::Code opcode = static_cast<Instruction::Code>(Instruction::IPUT + data.op_variant); in GenInlineIPut()
865 invoke->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInlineIPut()
Dgen_common.cc218 void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, in GenCompareAndBranch()
284 void Mir2Lir::GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken, in GenCompareZeroAndBranch()
326 void Mir2Lir::GenIntNarrowing(Instruction::Code opcode, RegLocation rl_dest, in GenIntNarrowing()
1394 void Mir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftOpLong()
1421 void Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpInt()
1574 bool Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem()
1681 void Mir2Lir::GenArithOpIntLit(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src, in GenArithOpIntLit()
1832 void Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpLong()
2054 if (!InexpensiveConstantInt(current_key, Instruction::Code::IF_EQ)) { in GenSmallPackedSwitch()
/art/test/115-native-bridge/
Dexpected.txt1 Code cache exists: './code_cache'.

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