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Searched refs:SRegOffset (Results 1 – 12 of 12) sorted by relevance

/art/compiler/dex/quick/
Dgen_loadstore.cc69 … StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), temp_reg, k32, kNotVolatile); in Workaround7250540()
96 LoadRefDisp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest, kNotVolatile); in LoadValueDirect()
98 Load32Disp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest); in LoadValueDirect()
129 LoadBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_src.s_reg_low), r_dest, k64, kNotVolatile); in LoadValueDirectWide()
218 StoreRefDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, kNotVolatile); in StoreValue()
220 Store32Disp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg); in StoreValue()
308 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, k64, kNotVolatile); in StoreValueWide()
336 Store32Disp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg); in StoreFinalValue()
372 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(rl_dest.s_reg_low), rl_dest.reg, k64, kNotVolatile); in StoreFinalValueWide()
Dgen_invoke.cc446 Store32Disp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), reg); in FlushIns()
451 Load32Disp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), in FlushIns()
455 Load32Disp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), in FlushIns()
808 Load32Disp(TargetPtrReg(kSp), SRegOffset(rl_arg.s_reg_low) + 4, reg); in GenDalvikArgsNoRange()
926 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); in GenDalvikArgsRange()
933 Store32Disp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg); in GenDalvikArgsRange()
946 int start_offset = SRegOffset(info->args[3].s_reg_low); in GenDalvikArgsRange()
Dgen_common.cc434 Store32Disp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg); in GenFilledNewArray()
464 OpRegRegImm(kOpAdd, r_src, TargetPtrReg(kSp), SRegOffset(rl_first.s_reg_low)); in GenFilledNewArray()
Dcodegen_util.cc297 v_reg_map.core_reg : SRegOffset(i), in DumpPromotionMap()
Dralloc_util.cc1362 int Mir2Lir::SRegOffset(int s_reg) { in SRegOffset() function in art::Mir2Lir
Dmir_to_lir.h814 int SRegOffset(int s_reg);
/art/compiler/dex/quick/arm64/
Dtarget_arm64.cc954 StoreRefDisp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), reg, kNotVolatile); in FlushIns()
956 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), reg, t_loc->wide ? k64 : k32, in FlushIns()
964 LoadRefDisp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), t_loc->reg, kNotVolatile); in FlushIns()
966 LoadBaseDisp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), t_loc->reg, in FlushIns()
1063 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); in GenDalvikArgsRange()
1071 StoreRefDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, kNotVolatile); in GenDalvikArgsRange()
1073 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k32, in GenDalvikArgsRange()
1085 int start_offset = SRegOffset(info->args[last_mapped_in + 1].s_reg_low); in GenDalvikArgsRange()
/art/compiler/dex/quick/x86/
Dfp_x86.cc127 int src_v_reg_offset = SRegOffset(rl_src.s_reg_low); in GenLongToFP()
128 int dest_v_reg_offset = SRegOffset(rl_dest.s_reg_low); in GenLongToFP()
344 int src1_v_reg_offset = SRegOffset(rl_src1.s_reg_low); in GenRemFP()
345 int src2_v_reg_offset = SRegOffset(rl_src2.s_reg_low); in GenRemFP()
346 int dest_v_reg_offset = SRegOffset(rl_dest.s_reg_low); in GenRemFP()
628 int displacement = SRegOffset(rl_dest.s_reg_low); in GenInlinedAbsFloat()
692 int displacement = SRegOffset(rl_dest.s_reg_low); in GenInlinedAbsDouble()
Dint_x86.cc988 LoadWordDisp(rs_rX86_SP, SRegOffset(rl_src_obj.s_reg_low) + push_offset, rs_obj); in GenInlinedCas()
995 LoadWordDisp(rs_rX86_SP, SRegOffset(rl_src_offset.s_reg_low) + push_offset, rs_off); in GenInlinedCas()
1408 int displacement = SRegOffset(rl_src1.s_reg_low); in GenMulLongConst()
1501 LoadBaseDisp(rs_rX86_SP, SRegOffset(rl_src1.s_reg_low) + HIWORD_OFFSET, rs_r1, k32, in GenMulLong()
1511 int displacement = SRegOffset(rl_src2.s_reg_low); in GenMulLong()
1525 LoadBaseDisp(rs_rX86_SP, SRegOffset(rl_src2.s_reg_low) + HIWORD_OFFSET, rs_r0, k32, in GenMulLong()
1533 int displacement = SRegOffset(rl_src1.s_reg_low); in GenMulLong()
1544 int displacement = SRegOffset(rl_src2.s_reg_low); in GenMulLong()
1559 LoadBaseDisp(rs_rX86_SP, SRegOffset(rl_src2.s_reg_low) + LOWORD_OFFSET, rs_r0, k32, in GenMulLong()
1567 int displacement = SRegOffset(rl_src1.s_reg_low); in GenMulLong()
[all …]
Dtarget_x86.cc917 int displacement = SRegOffset(rl_dest.s_reg_low); in GenConstWide()
1359 int displacement = SRegOffset(rl_start.s_reg_low) + sizeof(uint32_t); in GenInlinedIndexOf()
2268 int displacement = SRegOffset(rl_result.s_reg_low); in GenReduceVector()
2520 StoreRefDisp(rs_rX86_SP, SRegOffset(start_vreg + i), reg, kNotVolatile); in FlushIns()
2522 StoreBaseDisp(rs_rX86_SP, SRegOffset(start_vreg + i), reg, t_loc->wide ? k64 : k32, in FlushIns()
2530 LoadRefDisp(rs_rX86_SP, SRegOffset(start_vreg + i), t_loc->reg, kNotVolatile); in FlushIns()
2532 LoadBaseDisp(rs_rX86_SP, SRegOffset(start_vreg + i), t_loc->reg, in FlushIns()
2623 StoreBaseDisp(rs_rX86_SP, SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); in GenDalvikArgsRange()
2630 StoreBaseDisp(rs_rX86_SP, SRegOffset(loc.s_reg_low), loc.reg, k32, kNotVolatile); in GenDalvikArgsRange()
2640 int start_offset = SRegOffset(info->args[last_mapped_in + size_of_the_last_mapped].s_reg_low); in GenDalvikArgsRange()
Dcall_x86.cc292 int displacement = SRegOffset(base_of_code_->s_reg_low); in GenEntrySequence()
Dutility_x86.cc394 int displacement = SRegOffset(rl_dest.s_reg_low); in OpMemReg()
423 int displacement = SRegOffset(rl_value.s_reg_low); in OpRegMem()