| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 49 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
59 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass()
65 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass()
71 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass()
77 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR128BitRegisterClass()
83 static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeADDR64BitRegisterClass()
89 static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP32BitRegisterClass()
95 static DecodeStatus DecodeFP64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP64BitRegisterClass()
101 static DecodeStatus DecodeFP128BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP128BitRegisterClass()
108 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) { in decodeUImmOperand()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 34 virtual bool isBranch(const MCInst &Inst) const { in isBranch()
38 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch()
42 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch()
46 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch()
50 virtual bool isCall(const MCInst &Inst) const { in isCall()
54 virtual bool isReturn(const MCInst &Inst) const { in isReturn()
58 virtual bool isTerminator(const MCInst &Inst) const { in isTerminator()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 257 static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR128RegisterClass()
268 static DecodeStatus DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR128_loRegisterClass()
286 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR64RegisterClass()
307 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR32RegisterClass()
328 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR16RegisterClass()
349 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR8RegisterClass()
370 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64RegisterClass()
381 static DecodeStatus DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64spRegisterClass()
403 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass()
414 static DecodeStatus DecodeGPR32spRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32spRegisterClass()
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 907 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, in DecodeCPU16RegsRegisterClass()
916 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, in DecodeGPR64RegisterClass()
929 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, in DecodeGPRMM16RegisterClass()
940 static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, in DecodeGPRMM16ZeroRegisterClass()
951 static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, in DecodeGPRMM16MovePRegisterClass()
962 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, in DecodeGPR32RegisterClass()
973 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, in DecodePtrRegisterClass()
983 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, in DecodeDSPRRegisterClass()
990 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, in DecodeFGR64RegisterClass()
1002 static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, in DecodeFGR32RegisterClass()
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 179 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
186 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass()
192 static DecodeStatus DecodeCRRC0RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRC0RegisterClass()
198 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass()
204 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass()
210 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass()
216 static DecodeStatus DecodeVRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVRRCRegisterClass()
222 static DecodeStatus DecodeVSRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSRCRegisterClass()
228 static DecodeStatus DecodeVSFRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSFRCRegisterClass()
234 static DecodeStatus DecodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRCRegisterClass()
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 891 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
902 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnopcRegisterClass()
915 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRwithAPSRRegisterClass()
929 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPRRegisterClass()
941 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRPairRegisterClass()
956 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetcGPRRegisterClass()
986 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecoderGPRRegisterClass()
1006 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeSPRRegisterClass()
1027 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPRRegisterClass()
1041 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPR_8RegisterClass()
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 199 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, in DecodeGRRegsRegisterClass()
211 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, in DecodeRRegsRegisterClass()
223 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, in DecodeBitpOperand()
234 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, in DecodeNegImmOperand()
275 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2OpInstructionFail()
345 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RInstruction()
358 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RImmInstruction()
371 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeR2RInstruction()
384 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RSrcDstInstruction()
398 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeRUSInstruction()
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| /external/llvm/lib/Analysis/ |
| D | CFLAliasAnalysis.cpp | 273 void visitPtrToIntInst(PtrToIntInst &Inst) { in visitPtrToIntInst()
278 void visitIntToPtrInst(IntToPtrInst &Inst) { in visitIntToPtrInst()
283 void visitCastInst(CastInst &Inst) { in visitCastInst()
288 void visitBinaryOperator(BinaryOperator &Inst) { in visitBinaryOperator()
295 void visitAtomicCmpXchgInst(AtomicCmpXchgInst &Inst) { in visitAtomicCmpXchgInst()
301 void visitAtomicRMWInst(AtomicRMWInst &Inst) { in visitAtomicRMWInst()
307 void visitPHINode(PHINode &Inst) { in visitPHINode()
314 void visitGetElementPtrInst(GetElementPtrInst &Inst) { in visitGetElementPtrInst()
321 void visitSelectInst(SelectInst &Inst) { in visitSelectInst()
335 void visitLoadInst(LoadInst &Inst) { in visitLoadInst()
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| D | MemoryDependenceAnalysis.cpp | 109 Instruction *Inst, KeyTy Val) { in RemoveFromReverseMap()
124 AliasAnalysis::ModRefResult GetLocation(const Instruction *Inst, in GetLocation()
214 Instruction *Inst = --ScanIt; in getCallSiteDependencyFrom() local
356 static bool isVolatile(Instruction *Inst) { in isVolatile()
425 Instruction *Inst = --ScanIt; in getPointerDependencyFrom() local
667 if (Instruction *Inst = LocalCache.getInst()) { in getDependency() local
820 if (Instruction *Inst = ExistingResult->getResult().getInst()) { in getNonLocalCallDependency() local
853 if (Instruction *Inst = Dep.getInst()) in getNonLocalCallDependency() local
894 auto isOrdered = [](Instruction *Inst) { in getNonLocalPointerDependency()
990 Instruction *Inst = Dep.getInst(); in GetNonLocalInfoForBlock() local
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| D | PHITransAddr.cpp | 25 static bool CanPHITrans(Instruction *Inst) { in CanPHITrans()
118 Instruction *Inst = dyn_cast<Instruction>(Addr); in IsPotentiallyPHITranslatable() local
149 Instruction *Inst = dyn_cast<Instruction>(V); in PHITranslateSubExpr() local
327 if (Instruction *Inst = dyn_cast_or_null<Instruction>(Addr)) in PHITranslateValue() local
378 Instruction *Inst = cast<Instruction>(InVal); in InsertPHITranslatedSubExpr() local
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| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 69 static DecodeStatus DecodeRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeRegisterClass()
79 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeIntRegsRegisterClass()
90 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeCtrRegsRegisterClass()
110 static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeCtrRegs64RegisterClass()
134 static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeModRegsRegisterClass()
151 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDoubleRegsRegisterClass()
165 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodePredRegsRegisterClass()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsAnalyzeImmediate.h | 19 struct Inst { struct
21 Inst(unsigned Opc, unsigned ImmOpnd); argument
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 109 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, in DecodeIntRegsRegisterClass()
120 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, in DecodeI64RegsRegisterClass()
132 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, in DecodeFPRegsRegisterClass()
144 static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst, in DecodeDFPRegsRegisterClass()
156 static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, in DecodeQFPRegsRegisterClass()
170 static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFCCRegsRegisterClass()
295 static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, in DecodeLoadInt()
301 static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, in DecodeLoadFP()
307 static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address, in DecodeLoadDFP()
313 static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address, in DecodeLoadQFP()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AddressTypePromotion.cpp | 155 bool AArch64AddressTypePromotion::canGetThrough(const Instruction *Inst) { in canGetThrough()
178 bool AArch64AddressTypePromotion::shouldGetThrough(const Instruction *Inst) { in shouldGetThrough()
207 static bool shouldSExtOperand(const Instruction *Inst, int OpIdx) { in shouldSExtOperand()
271 while (auto *Inst = dyn_cast<Instruction>(SExt->getOperand(0))) { in propagateSignExtension() local
440 const Instruction *Inst = dyn_cast<GetElementPtrInst>(U); in analyzeSExtension() local
451 Instruction *Inst = SExt; in analyzeSExtension() local
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| /external/llvm/lib/Transforms/Scalar/ |
| D | Sink.cpp | 76 bool Sinking::AllUsesDominatedByBlock(Instruction *Inst, in AllUsesDominatedByBlock()
137 Instruction *Inst = I; // The instruction to sink. in ProcessBlock() local
157 static bool isSafeToMove(Instruction *Inst, AliasAnalysis *AA, in isSafeToMove()
180 bool Sinking::IsAcceptableTarget(Instruction *Inst, in IsAcceptableTarget()
219 bool Sinking::SinkInstruction(Instruction *Inst, in SinkInstruction()
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| D | EarlyCSE.cpp | 53 Instruction *Inst; member
91 Instruction *Inst = Val.Inst; in getHashValue() local
200 Instruction *Inst; member
238 Instruction *Inst = Val.Inst; in getHashValue() local
384 ParseMemoryInst(Instruction *Inst, const TargetTransformInfo &TTI) in ParseMemoryInst()
415 bool isMatchingMemLoc(const ParseMemoryInst &Inst) { in isMatchingMemLoc()
440 Value *getOrCreateResult(Value *Inst, Type *ExpectedType) const { in getOrCreateResult()
476 Instruction *Inst = I++; in processNode() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1098 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
1108 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
1113 void addGPR32as64Operands(MCInst &Inst, unsigned N) const { in addGPR32as64Operands()
1125 void addVectorReg64Operands(MCInst &Inst, unsigned N) const { in addVectorReg64Operands()
1132 void addVectorReg128Operands(MCInst &Inst, unsigned N) const { in addVectorReg128Operands()
1139 void addVectorRegLoOperands(MCInst &Inst, unsigned N) const { in addVectorRegLoOperands()
1145 void addVectorList64Operands(MCInst &Inst, unsigned N) const { in addVectorList64Operands()
1156 void addVectorList128Operands(MCInst &Inst, unsigned N) const { in addVectorList128Operands()
1166 void addVectorIndex1Operands(MCInst &Inst, unsigned N) const { in addVectorIndex1Operands()
1171 void addVectorIndexBOperands(MCInst &Inst, unsigned N) const { in addVectorIndexBOperands()
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| /external/llvm/lib/Transforms/ObjCARC/ |
| D | DependencyAnalysis.cpp | 35 bool llvm::objcarc::CanAlterRefCount(const Instruction *Inst, const Value *Ptr, in CanAlterRefCount()
71 bool llvm::objcarc::CanDecrementRefCount(const Instruction *Inst, in CanDecrementRefCount()
85 bool llvm::objcarc::CanUse(const Instruction *Inst, const Value *Ptr, in CanUse()
135 llvm::objcarc::Depends(DependenceKind Flavor, Instruction *Inst, in Depends()
255 Instruction *Inst = --LocalStartPos; in FindDependencies() local
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| D | PtrState.cpp | 215 bool BottomUpPtrState::HandlePotentialAlterRefCount(Instruction *Inst, in HandlePotentialAlterRefCount()
243 void BottomUpPtrState::HandlePotentialUse(BasicBlock *BB, Instruction *Inst, in HandlePotentialUse()
350 bool TopDownPtrState::HandlePotentialAlterRefCount(Instruction *Inst, in HandlePotentialAlterRefCount()
383 void TopDownPtrState::HandlePotentialUse(Instruction *Inst, const Value *Ptr, in HandlePotentialUse()
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| /external/llvm/utils/TableGen/ |
| D | InstrInfoEmitter.cpp | 88 InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) { in GetOperandInfo()
180 for (const CodeGenInstruction *Inst : Target.instructions()) { in EmitOperandInfo() local
208 for (const CodeGenInstruction *Inst : NumberedInstructions) { in initOperandMapData() local
363 Record *Inst = II->TheDef; in run() local
389 for (const CodeGenInstruction *Inst : NumberedInstructions) { in run() local
405 for (const CodeGenInstruction *Inst : NumberedInstructions) { in run() local
464 void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, in emitRecord()
589 for (const CodeGenInstruction *Inst : NumberedInstructions) in emitEnums() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1750 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
1760 void addCondCodeOperands(MCInst &Inst, unsigned N) const { in addCondCodeOperands()
1767 void addCoprocNumOperands(MCInst &Inst, unsigned N) const { in addCoprocNumOperands()
1772 void addCoprocRegOperands(MCInst &Inst, unsigned N) const { in addCoprocRegOperands()
1777 void addCoprocOptionOperands(MCInst &Inst, unsigned N) const { in addCoprocOptionOperands()
1782 void addITMaskOperands(MCInst &Inst, unsigned N) const { in addITMaskOperands()
1787 void addITCondCodeOperands(MCInst &Inst, unsigned N) const { in addITCondCodeOperands()
1792 void addCCOutOperands(MCInst &Inst, unsigned N) const { in addCCOutOperands()
1797 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
1802 void addRegShiftedRegOperands(MCInst &Inst, unsigned N) const { in addRegShiftedRegOperands()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 686 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
696 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
703 void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR32AsmRegOperands()
708 void addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegOperands()
713 void addGPRMM16AsmRegZeroOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegZeroOperands()
718 void addGPRMM16AsmRegMovePOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegMovePOperands()
726 void addGPR64AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR64AsmRegOperands()
731 void addAFGR64AsmRegOperands(MCInst &Inst, unsigned N) const { in addAFGR64AsmRegOperands()
736 void addFGR64AsmRegOperands(MCInst &Inst, unsigned N) const { in addFGR64AsmRegOperands()
741 void addFGR32AsmRegOperands(MCInst &Inst, unsigned N) const { in addFGR32AsmRegOperands()
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64ELFStreamer.cpp | 61 void AArch64TargetAsmStreamer::emitInst(uint32_t Inst) { in emitInst()
113 void EmitInstruction(const MCInst &Inst, in EmitInstruction()
119 void emitInst(uint32_t Inst) { in emitInst()
201 void AArch64TargetELFStreamer::emitInst(uint32_t Inst) { in emitInst()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsAsmBackend.h | 57 bool mayNeedRelaxation(const MCInst &Inst) const override { in mayNeedRelaxation()
77 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {} in relaxInstruction()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_misc.cpp | 217 lp_set_load_alignment(LLVMValueRef Inst, in lp_set_load_alignment()
225 lp_set_store_alignment(LLVMValueRef Inst, in lp_set_store_alignment()
|