| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 346 unsigned NewOpc = getMatchingPairOpcode(Opc); in mergePairedInsns() local
655 unsigned NewOpc = getPreIndexedOpcode(I->getOpcode()); in mergePreIdxUpdateInsn() local
698 unsigned NewOpc = getPostIndexedOpcode(I->getOpcode()); in mergePostIdxUpdateInsn() local
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| D | AArch64AdvSIMDScalarPass.cpp | 290 int NewOpc = getTransformOpcode(OldOpc); in transformInstruction() local
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| D | AArch64InstrInfo.cpp | 839 unsigned NewOpc = convertFlagSettingOpcode(CmpInstr); in optimizeCompareInstr() local
872 unsigned NewOpc = MI->getOpcode(); in optimizeCompareInstr() local
2485 unsigned NewOpc = convertFlagSettingOpcode(&Root); in hasPattern() local
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| D | AArch64ISelLowering.cpp | 1857 unsigned NewOpc = 0; in LowerMUL() local
8186 unsigned NewOpc = 0; in performNEONPostLDSTCombine() local
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 344 unsigned NewOpc; in translateImmediate() local
378 unsigned NewOpc; in translateImmediate() local
409 unsigned NewOpc; in translateImmediate() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 802 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local
841 unsigned NewOpc; in ExpandMI() local
1085 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local
1116 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
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| D | Thumb2InstrInfo.cpp | 496 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex() local
530 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
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| D | ARMLoadStoreOptimizer.cpp | 1169 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local
1272 unsigned NewOpc = 0; in MergeBaseUpdateLoadStore() local
1452 DebugLoc dl, unsigned NewOpc, in InsertLDR_STR()
1512 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1535 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1804 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local
1961 unsigned &NewOpc, unsigned &EvenReg, in CanFormLdStDWord()
2124 unsigned NewOpc = 0; in RescheduleOps() local
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| D | ThumbRegisterInfo.cpp | 398 unsigned NewOpc = convertToNonSPOpcode(Opcode); in rewriteFrameIndex() local
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| D | ARMConstantIslandPass.cpp | 1714 unsigned NewOpc = 0; in optimizeThumb2Instructions() local
1768 unsigned NewOpc = 0; in optimizeThumb2Branches() local
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| D | ARMISelLowering.cpp | 2714 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) in LowerINTRINSIC_WO_CHAIN() local
5887 unsigned NewOpc = 0; in LowerMUL() local
7321 unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ? in EmitInstrWithCustomInserter() local
7345 unsigned NewOpc; in EmitInstrWithCustomInserter() local
7559 unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); in AdjustInstrPostInstrSelection() local
8778 unsigned NewOpc = 0; in CombineBaseUpdate() local
8980 unsigned NewOpc = 0; in CombineVLDDUP() local
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| D | ARMISelDAGToDAG.cpp | 3026 unsigned NewOpc = isThumb ? (IsAcquire ? ARM::t2LDAEXD : ARM::t2LDREXD) in Select() local
3106 unsigned NewOpc = isThumb ? (IsRelease ? ARM::t2STLEXD : ARM::t2STREXD) in Select() local
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 473 unsigned NewOpc; in Lower() local
497 unsigned NewOpc; in Lower() local
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| D | X86InstrInfo.cpp | 4487 unsigned NewOpc; in optimizeCompareInstr() local
5156 unsigned NewOpc = 0; in foldMemoryOperandImpl() local
5245 unsigned NewOpc = 0; in foldMemoryOperandImpl() local
5483 unsigned NewOpc; in unfoldMemoryOperand() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 279 MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, in genInstrWithNewOpc()
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| D | MipsLongBranch.cpp | 219 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode()); in replaceBranch() local
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| D | MipsSEISelLowering.cpp | 1259 SDValue MipsSETargetLowering::lowerMulDiv(SDValue Op, unsigned NewOpc, in lowerMulDiv()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelDAGToDAG.cpp | 166 unsigned int NewOpc = AMDGPU::COPY; in Select() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 457 unsigned NewOpc; in PromoteFP_TO_INT() local
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| D | LegalizeIntegerTypes.cpp | 393 unsigned NewOpc = N->getOpcode(); in PromoteIntRes_FP_TO_XINT() local
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 2421 unsigned NewOpc; in processInstruction() local
2445 unsigned NewOpc; in processInstruction() local
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| /external/llvm/lib/CodeGen/ |
| D | MachineLICM.cpp | 1247 unsigned NewOpc = in ExtractHoistableLoad() local
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| D | TwoAddressInstructionPass.cpp | 1258 unsigned NewOpc = in tryInstructionTransform() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 7869 unsigned NewOpc; in processInstruction() local
8343 unsigned NewOpc; in processInstruction() local
8458 unsigned NewOpc; in processInstruction() local
8498 unsigned NewOpc; in processInstruction() local
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| /external/llvm/lib/Target/R600/ |
| D | SIInstrInfo.cpp | 432 int NewOpc; in commuteOpcode() local
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