| /art/compiler/dwarf/ |
| D | register.h | 24 class Reg {
26 explicit Reg(int reg_num) : num_(reg_num) { } in Reg() function
38 static Reg ArmCore(int num) { return Reg(num); } in ArmCore()
39 static Reg ArmFp(int num) { return Reg(64 + num); } // S0–S31. in ArmFp()
40 static Reg Arm64Core(int num) { return Reg(num); } in Arm64Core()
41 static Reg Arm64Fp(int num) { return Reg(64 + num); } // V0-V31. in Arm64Fp()
42 static Reg MipsCore(int num) { return Reg(num); } in MipsCore()
43 static Reg Mips64Core(int num) { return Reg(num); } in Mips64Core()
44 static Reg X86Core(int num) { return Reg(num); } in X86Core()
45 static Reg X86Fp(int num) { return Reg(21 + num); } in X86Fp()
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| D | debug_frame_opcode_writer.h | 71 void ALWAYS_INLINE RelOffset(Reg reg, int offset) { in RelOffset()
81 void ALWAYS_INLINE RelOffsetForMany(Reg reg_base, int offset, in RelOffsetForMany()
90 RelOffset(Reg(reg_base.num() + i), offset); in RelOffsetForMany()
97 void ALWAYS_INLINE RestoreMany(Reg reg_base, uint32_t reg_mask) { in RestoreMany()
104 Restore(Reg(reg_base.num() + i)); in RestoreMany()
115 void ALWAYS_INLINE Offset(Reg reg, int offset) { in Offset()
137 void ALWAYS_INLINE Restore(Reg reg) { in Restore()
149 void ALWAYS_INLINE Undefined(Reg reg) { in Undefined()
157 void ALWAYS_INLINE SameValue(Reg reg) { in SameValue()
166 void ALWAYS_INLINE Register(Reg reg, Reg new_reg) { in Register()
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| D | dwarf_test.cc | 42 const Reg reg(6); in TEST_F()
77 opcodes.Offset(Reg(0x3F), -offset); in TEST_F()
81 opcodes.Offset(Reg(0x40), -offset); in TEST_F()
83 opcodes.Offset(Reg(0x40), offset); in TEST_F()
89 opcodes.Register(reg, Reg(1)); in TEST_F()
95 opcodes.Restore(Reg(0x3F)); in TEST_F()
97 opcodes.Restore(Reg(0x40)); in TEST_F()
109 opcodes.DefCFA(Reg(4), 100); // ESP in TEST_F()
113 opcodes.RelOffset(Reg(0), 0); // push R0 in TEST_F()
115 opcodes.RelOffset(Reg(1), 4); // push R1 in TEST_F()
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| D | headers.h | 42 Reg return_address_register, in WriteDebugFrameCIE()
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| /art/compiler/utils/ |
| D | assembler_test.h | 45 template<typename Ass, typename Reg, typename FPReg, typename Imm>
63 std::string RepeatR(void (Ass::*f)(Reg), std::string fmt) { in RepeatR() argument
64 return RepeatTemplatedRegister<Reg>(f, in RepeatR()
70 std::string Repeatr(void (Ass::*f)(Reg), std::string fmt) { in Repeatr() argument
71 return RepeatTemplatedRegister<Reg>(f, in Repeatr()
77 std::string RepeatRR(void (Ass::*f)(Reg, Reg), std::string fmt) { in RepeatRR() argument
78 return RepeatTemplatedRegisters<Reg, Reg>(f, in RepeatRR()
86 std::string Repeatrr(void (Ass::*f)(Reg, Reg), std::string fmt) { in Repeatrr() argument
87 return RepeatTemplatedRegisters<Reg, Reg>(f, in Repeatrr()
95 std::string Repeatrb(void (Ass::*f)(Reg, Reg), std::string fmt) { in Repeatrb() argument
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| /art/compiler/ |
| D | elf_writer_debug.cc | 44 opcodes.DefCFA(Reg::ArmCore(13), 0); // R13(SP). in WriteDebugFrameCIE()
48 opcodes.Undefined(Reg::ArmCore(reg)); in WriteDebugFrameCIE()
50 opcodes.SameValue(Reg::ArmCore(reg)); in WriteDebugFrameCIE()
56 opcodes.Undefined(Reg::ArmFp(reg)); in WriteDebugFrameCIE()
58 opcodes.SameValue(Reg::ArmFp(reg)); in WriteDebugFrameCIE()
61 auto return_reg = Reg::ArmCore(14); // R14(LR). in WriteDebugFrameCIE()
68 opcodes.DefCFA(Reg::Arm64Core(31), 0); // R31(SP). in WriteDebugFrameCIE()
72 opcodes.Undefined(Reg::Arm64Core(reg)); in WriteDebugFrameCIE()
74 opcodes.SameValue(Reg::Arm64Core(reg)); in WriteDebugFrameCIE()
80 opcodes.Undefined(Reg::Arm64Fp(reg)); in WriteDebugFrameCIE()
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| D | cfi_test.h | 51 dwarf::WriteDebugFrameCIE(is64bit, dwarf::DW_EH_PE_absptr, dwarf::Reg(8), in GenerateExpected()
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| /art/compiler/utils/arm/ |
| D | assembler_arm_test.h | 24 template<typename Ass, typename Reg, typename FPReg, typename Imm, typename SOp, typename Cond>
25 class AssemblerArmTest : public AssemblerTest<Ass, Reg, FPReg, Imm> {
27 typedef AssemblerTest<Ass, Reg, FPReg, Imm> Base;
60 std::string RepeatRRIIC(void (Ass::*f)(Reg, Reg, Imm, Imm, Cond), in RepeatRRIIC() argument
159 std::string RepeatRRiiC(void (Ass::*f)(Reg, Reg, Imm, Imm, Cond), in RepeatRRiiC() argument
162 return RepeatTemplatedRRiiC<Reg, Reg>(f, GetRegisters(), GetRegisters(), in RepeatRRiiC()
250 std::string RepeatRRC(void (Ass::*f)(Reg, Reg, Cond), std::string fmt) { in RepeatRRC() argument
312 std::string RepeatRRRC(void (Ass::*f)(Reg, Reg, Reg, Cond), std::string fmt) { in RepeatRRRC() argument
517 virtual Reg GetPCRegister() = 0;
518 virtual std::vector<Reg*> GetRegistersWithoutPC() { in GetRegistersWithoutPC()
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| D | assembler_arm.cc | 373 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
374 return dwarf::Reg::ArmCore(static_cast<int>(reg)); in DWARFReg()
377 static dwarf::Reg DWARFReg(SRegister reg) { in DWARFReg()
378 return dwarf::Reg::ArmFp(static_cast<int>(reg)); in DWARFReg()
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| /art/compiler/dex/quick/x86/ |
| D | call_x86.cc | 148 static dwarf::Reg DwarfCoreReg(bool is_x86_64, int num) { in DwarfCoreReg()
149 return is_x86_64 ? dwarf::Reg::X86_64Core(num) : dwarf::Reg::X86Core(num); in DwarfCoreReg()
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| D | target_x86.cc | 727 static dwarf::Reg DwarfCoreReg(bool is_x86_64, int num) { in DwarfCoreReg()
728 return is_x86_64 ? dwarf::Reg::X86_64Core(num) : dwarf::Reg::X86Core(num); in DwarfCoreReg()
731 static dwarf::Reg DwarfFpReg(bool is_x86_64, int num) { in DwarfFpReg()
732 return is_x86_64 ? dwarf::Reg::X86_64Fp(num) : dwarf::Reg::X86Fp(num); in DwarfFpReg()
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| D | int_x86.cc | 833 static dwarf::Reg DwarfCoreReg(bool is_x86_64, int num) { in DwarfCoreReg()
834 return is_x86_64 ? dwarf::Reg::X86_64Core(num) : dwarf::Reg::X86Core(num); in DwarfCoreReg()
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| /art/compiler/dex/quick/arm/ |
| D | call_arm.cc | 359 static dwarf::Reg DwarfCoreReg(int num) { in DwarfCoreReg()
360 return dwarf::Reg::ArmCore(num); in DwarfCoreReg()
363 static dwarf::Reg DwarfFpReg(int num) { in DwarfFpReg()
364 return dwarf::Reg::ArmFp(num); in DwarfFpReg()
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| /art/compiler/dex/quick/mips/ |
| D | call_mips.cc | 244 static dwarf::Reg DwarfCoreReg(int num) { in DwarfCoreReg()
245 return dwarf::Reg::MipsCore(num); in DwarfCoreReg()
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| D | target_mips.cc | 840 static dwarf::Reg DwarfCoreReg(int num) { in DwarfCoreReg()
841 return dwarf::Reg::MipsCore(num); in DwarfCoreReg()
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| /art/compiler/dex/quick/arm64/ |
| D | call_arm64.cc | 286 static dwarf::Reg DwarfCoreReg(int num) { in DwarfCoreReg()
287 return dwarf::Reg::Arm64Core(num); in DwarfCoreReg()
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| D | int_arm64.cc | 1468 static dwarf::Reg DwarfCoreReg(int num) { in DwarfCoreReg()
1469 return dwarf::Reg::Arm64Core(num); in DwarfCoreReg()
1472 static dwarf::Reg DwarfFpReg(int num) { in DwarfFpReg()
1473 return dwarf::Reg::Arm64Fp(num); in DwarfFpReg()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 643 static inline dwarf::Reg DWARFReg(CPURegister reg) { in DWARFReg()
645 return dwarf::Reg::Arm64Fp(reg.code()); in DWARFReg()
648 return dwarf::Reg::Arm64Core(reg.code()); in DWARFReg()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 540 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
541 return dwarf::Reg::MipsCore(static_cast<int>(reg)); in DWARFReg()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 2348 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
2349 return dwarf::Reg::X86_64Core(static_cast<int>(reg)); in DWARFReg()
2351 static dwarf::Reg DWARFReg(FloatRegister reg) { in DWARFReg()
2352 return dwarf::Reg::X86_64Fp(static_cast<int>(reg)); in DWARFReg()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 1065 static dwarf::Reg DWARFReg(GpuRegister reg) { in DWARFReg()
1066 return dwarf::Reg::Mips64Core(static_cast<int>(reg)); in DWARFReg()
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| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 1705 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
1706 return dwarf::Reg::X86Core(static_cast<int>(reg)); in DWARFReg()
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| /art/compiler/optimizing/ |
| D | code_generator_arm.cc | 517 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
518 return dwarf::Reg::ArmCore(static_cast<int>(reg)); in DWARFReg()
521 static dwarf::Reg DWARFReg(SRegister reg) { in DWARFReg()
522 return dwarf::Reg::ArmFp(static_cast<int>(reg)); in DWARFReg()
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| D | code_generator_x86_64.cc | 501 static dwarf::Reg DWARFReg(Register reg) { in DWARFReg()
502 return dwarf::Reg::X86_64Core(static_cast<int>(reg)); in DWARFReg()
505 static dwarf::Reg DWARFReg(FloatRegister reg) { in DWARFReg()
506 return dwarf::Reg::X86_64Fp(static_cast<int>(reg)); in DWARFReg()
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| D | code_generator_mips64.cc | 474 static dwarf::Reg DWARFReg(GpuRegister reg) { in DWARFReg()
475 return dwarf::Reg::Mips64Core(static_cast<int>(reg)); in DWARFReg()
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