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Searched refs:rl_src (Results 1 – 25 of 25) sorted by relevance

/art/compiler/dex/quick/
Dgen_loadstore.cc44 void Mir2Lir::LoadValueDirect(RegLocation rl_src, RegStorage r_dest) { in LoadValueDirect() argument
45 rl_src = rl_src.wide ? UpdateLocWide(rl_src) : UpdateLoc(rl_src); in LoadValueDirect()
46 if (rl_src.location == kLocPhysReg) { in LoadValueDirect()
47 OpRegCopy(r_dest, rl_src.reg); in LoadValueDirect()
48 } else if (IsInexpensiveConstant(rl_src)) { in LoadValueDirect()
50 DCHECK(!rl_src.ref || (mir_graph_->ConstantValue(rl_src) == 0)); in LoadValueDirect()
51 LoadConstantNoClobber(r_dest, mir_graph_->ConstantValue(rl_src)); in LoadValueDirect()
53 DCHECK((rl_src.location == kLocDalvikFrame) || in LoadValueDirect()
54 (rl_src.location == kLocCompilerTemp)); in LoadValueDirect()
57 if (rl_src.ref) { in LoadValueDirect()
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Dmir_to_lir.cc477 RegLocation rl_src[3]; in CompileDalvikInstruction() local
491 rl_src[0] = rl_src[1] = rl_src[2] = mir_graph_->GetBadLoc(); in CompileDalvikInstruction()
494 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); in CompileDalvikInstruction()
497 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); in CompileDalvikInstruction()
503 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); in CompileDalvikInstruction()
506 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); in CompileDalvikInstruction()
512 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); in CompileDalvikInstruction()
514 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); in CompileDalvikInstruction()
545 DCHECK(rl_src[0].ref); in CompileDalvikInstruction()
551 StoreValue(GetReturn(ShortyToRegClass(cu_->shorty[0])), rl_src[0]); in CompileDalvikInstruction()
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Dgen_common.cc413 void Mir2Lir::GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken) { in GenCompareZeroAndBranch() argument
415 RegisterClass reg_class = rl_src.ref ? kRefReg : kCoreReg; in GenCompareZeroAndBranch()
416 rl_src = LoadValue(rl_src, reg_class); in GenCompareZeroAndBranch()
440 OpCmpImmBranch(cond, rl_src.reg, 0, taken); in GenCompareZeroAndBranch()
443 void Mir2Lir::GenIntToLong(RegLocation rl_dest, RegLocation rl_src) { in GenIntToLong() argument
445 if (rl_src.location == kLocPhysReg) { in GenIntToLong()
446 OpRegCopy(rl_result.reg, rl_src.reg); in GenIntToLong()
448 LoadValueDirect(rl_src, rl_result.reg.GetLow()); in GenIntToLong()
454 void Mir2Lir::GenLongToInt(RegLocation rl_dest, RegLocation rl_src) { in GenLongToInt() argument
455 rl_src = UpdateLocWide(rl_src); in GenLongToInt()
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Dmir_to_lir.h673 bool IsInexpensiveConstant(RegLocation rl_src);
793 RegLocation rl_src, RegLocation rl_dest, int lit);
794 bool HandleEasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit);
815 void GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken);
816 virtual void GenIntToLong(RegLocation rl_dest, RegLocation rl_src);
817 virtual void GenLongToInt(RegLocation rl_dest, RegLocation rl_src);
819 RegLocation rl_src);
821 RegLocation rl_src);
823 void GenFillArrayData(MIR* mir, DexOffset table_offset, RegLocation rl_src);
824 void GenSput(MIR* mir, RegLocation rl_src, OpSize size);
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Dgen_invoke.cc405 RegLocation rl_src = rl_method; in FlushIns() local
406 rl_src.location = kLocPhysReg; in FlushIns()
407 rl_src.reg = TargetReg(kArg0, kRef); in FlushIns()
408 rl_src.home = false; in FlushIns()
409 MarkLive(rl_src); in FlushIns()
412 StoreValueWide(rl_method, rl_src); in FlushIns()
414 StoreValue(rl_method, rl_src); in FlushIns()
418 StoreBaseDisp(TargetPtrReg(kSp), 0, rl_src.reg, kWord, kNotVolatile); in FlushIns()
1212 RegLocation rl_src = info->args[0]; in GenInlinedAbsInt() local
1213 rl_src = LoadValue(rl_src, kCoreReg); in GenInlinedAbsInt()
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Dcodegen_util.cc61 bool Mir2Lir::IsInexpensiveConstant(RegLocation rl_src) { in IsInexpensiveConstant() argument
63 if (rl_src.is_const) { in IsInexpensiveConstant()
64 if (rl_src.wide) { in IsInexpensiveConstant()
67 if (rl_src.high_word) { in IsInexpensiveConstant()
68 rl_src.high_word = false; in IsInexpensiveConstant()
69 rl_src.s_reg_low--; in IsInexpensiveConstant()
70 rl_src.orig_sreg--; in IsInexpensiveConstant()
72 if (rl_src.fp) { in IsInexpensiveConstant()
73 res = InexpensiveConstantDouble(mir_graph_->ConstantValueWide(rl_src)); in IsInexpensiveConstant()
75 res = InexpensiveConstantLong(mir_graph_->ConstantValueWide(rl_src)); in IsInexpensiveConstant()
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/art/compiler/dex/quick/arm64/
Dfp_arm64.cc148 RegLocation rl_dest, RegLocation rl_src) { in GenConversion() argument
213 if (rl_src.wide) { in GenConversion()
214 rl_src = LoadValueWide(rl_src, src_reg_class); in GenConversion()
216 rl_src = LoadValue(rl_src, src_reg_class); in GenConversion()
220 NewLIR2(op, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenConversion()
337 void Arm64Mir2Lir::GenNegFloat(RegLocation rl_dest, RegLocation rl_src) { in GenNegFloat() argument
339 rl_src = LoadValue(rl_src, kFPReg); in GenNegFloat()
341 NewLIR2(kA64Fneg2ff, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenNegFloat()
345 void Arm64Mir2Lir::GenNegDouble(RegLocation rl_dest, RegLocation rl_src) { in GenNegDouble() argument
347 rl_src = LoadValueWide(rl_src, kFPReg); in GenNegDouble()
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Dint_arm64.cc193 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); in GenSelect() local
194 rl_src = LoadValue(rl_src, rl_src.ref ? kRefReg : kCoreReg); in GenSelect()
196 OpRegImm(kOpCmp, rl_src.reg, 0); in GenSelect()
417 RegLocation rl_src, RegLocation rl_dest, int lit) { in SmallLiteralDivRem() argument
433 rl_src = LoadValue(rl_src, kCoreReg); in SmallLiteralDivRem()
436 NewLIR3(kA64Smull3xww, As64BitReg(r_long_mul).GetReg(), r_magic.GetReg(), rl_src.reg.GetReg()); in SmallLiteralDivRem()
440 OpRegRegRegShift(kOpSub, rl_result.reg, r_long_mul, rl_src.reg, EncodeShift(kA64Asr, 31)); in SmallLiteralDivRem()
445 OpRegRegRegShift(kOpSub, rl_result.reg, r_long_mul, rl_src.reg, EncodeShift(kA64Asr, 31)); in SmallLiteralDivRem()
448 OpRegRegRegShift(kOpAdd, As64BitReg(r_long_mul), As64BitReg(rl_src.reg), in SmallLiteralDivRem()
451 OpRegRegRegShift(kOpSub, rl_result.reg, r_long_mul, rl_src.reg, EncodeShift(kA64Asr, 31)); in SmallLiteralDivRem()
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Dcodegen_arm64.h54 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
57 RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
59 RegLocation rl_src, RegLocation rl_dest, int64_t lit);
60 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
138 RegLocation rl_src, int scale, bool card_mark) OVERRIDE;
147 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
164 void GenIntToLong(RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
186 void GenMonitorEnter(int opt_flags, RegLocation rl_src) OVERRIDE;
187 void GenMonitorExit(int opt_flags, RegLocation rl_src) OVERRIDE;
189 void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,
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Dcall_arm64.cc55 void Arm64Mir2Lir::GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) { in GenLargeSparseSwitch() argument
67 rl_src = LoadValue(rl_src, kCoreReg); in GenLargeSparseSwitch()
87 OpRegReg(kOpCmp, r_key, rl_src.reg); in GenLargeSparseSwitch()
104 void Arm64Mir2Lir::GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) { in GenLargePackedSwitch() argument
116 rl_src = LoadValue(rl_src, kCoreReg); in GenLargePackedSwitch()
124 key_reg = rl_src.reg; in GenLargePackedSwitch()
127 OpRegRegImm(kOpSub, key_reg, rl_src.reg, low_key); in GenLargePackedSwitch()
155 void Arm64Mir2Lir::GenMonitorEnter(int opt_flags, RegLocation rl_src) { in GenMonitorEnter() argument
163 LoadValueDirectFixed(rl_src, rs_x0); // = TargetReg(kArg0, kRef) in GenMonitorEnter()
209 void Arm64Mir2Lir::GenMonitorExit(int opt_flags, RegLocation rl_src) { in GenMonitorExit() argument
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Dtarget_arm64.cc888 RegLocation rl_src[3]; in GenMachineSpecificExtendedMethodMIR() local
890 rl_src[0] = rl_src[1] = rl_src[2] = mir_graph_->GetBadLoc(); in GenMachineSpecificExtendedMethodMIR()
896 rl_src[0] = mir_graph_->GetSrc(mir, 0); in GenMachineSpecificExtendedMethodMIR()
897 rl_src[1] = mir_graph_->GetSrc(mir, 1); in GenMachineSpecificExtendedMethodMIR()
898 rl_src[2]= mir_graph_->GetSrc(mir, 2); in GenMachineSpecificExtendedMethodMIR()
899 GenMaddMsubInt(rl_dest, rl_src[0], rl_src[1], rl_src[2], opcode == kMirOpMsubInt); in GenMachineSpecificExtendedMethodMIR()
904 rl_src[0] = mir_graph_->GetSrcWide(mir, 0); in GenMachineSpecificExtendedMethodMIR()
905 rl_src[1] = mir_graph_->GetSrcWide(mir, 2); in GenMachineSpecificExtendedMethodMIR()
906 rl_src[2] = mir_graph_->GetSrcWide(mir, 4); in GenMachineSpecificExtendedMethodMIR()
907 GenMaddMsubLong(rl_dest, rl_src[0], rl_src[1], rl_src[2], opcode == kMirOpMsubLong); in GenMachineSpecificExtendedMethodMIR()
/art/compiler/dex/quick/x86/
Dfp_x86.cc141 void X86Mir2Lir::GenLongToFP(RegLocation rl_dest, RegLocation rl_src, bool is_double) { in GenLongToFP() argument
143 int src_v_reg_offset = SRegOffset(rl_src.s_reg_low); in GenLongToFP()
147 rl_src = UpdateLocWide(rl_src); in GenLongToFP()
153 if (rl_src.location == kLocPhysReg) { in GenLongToFP()
154 RegisterInfo* reg_info = GetRegInfo(rl_src.reg); in GenLongToFP()
160 ResetDef(rl_src.reg); in GenLongToFP()
165 StoreBaseDisp(rs_rSP, src_v_reg_offset, rl_src.reg, k64, kNotVolatile); in GenLongToFP()
211 RegLocation rl_src) { in GenConversion() argument
233 rl_src = LoadValue(rl_src, kFPReg); in GenConversion()
241 NewLIR2(kX86ComissRR, rl_src.reg.GetReg(), temp_reg.GetReg()); in GenConversion()
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Dint_x86.cc276 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); in GenSelect() local
279 RegisterClass src_reg_class = rl_src.ref ? kRefReg : kCoreReg; in GenSelect()
297 rl_src = LoadValue(rl_src, src_reg_class); in GenSelect()
321 (rl_src.location == kLocPhysReg && rl_src.reg.GetRegNum() == rl_result.reg.GetRegNum()); in GenSelect()
331 OpRegImm(kOpCmp, rl_src.reg, 0); in GenSelect()
350 rl_src = LoadValue(rl_src, src_reg_class); in GenSelect()
373 OpRegImm(kOpCmp, rl_src.reg, 0); in GenSelect()
606 RegLocation X86Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src, in GenDivRemLit() argument
615 LoadValueDirectFixed(rl_src, rl_result.reg); in GenDivRemLit()
623 LoadValueDirectFixed(rl_src, rl_result.reg); in GenDivRemLit()
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Dcodegen_x86.h83 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
85 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
98 void GenLongToInt(RegLocation rl_dest, RegLocation rl_src);
178 RegLocation rl_index, RegLocation rl_src, int scale, bool card_mark) OVERRIDE;
186 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
207 void GenIntToLong(RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
218 bool GenLongImm(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
247 void GenLongArith(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
255 virtual void GenLongRegOrMemOp(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
276 void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,
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Dcall_x86.cc38 void X86Mir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargeSparseSwitch() argument
39 GenSmallSparseSwitch(mir, table_offset, rl_src); in GenLargeSparseSwitch()
58 void X86Mir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargePackedSwitch() argument
70 rl_src = LoadValue(rl_src, kCoreReg); in GenLargePackedSwitch()
76 keyReg = rl_src.reg; in GenLargePackedSwitch()
79 OpRegRegImm(kOpSub, keyReg, rl_src.reg, low_key); in GenLargePackedSwitch()
Dtarget_x86.cc1122 RegLocation rl_src = info->args[0]; in GenInlinedArrayCopyCharArray() local
1136 LoadValueDirectFixed(rl_src, rs_rAX); in GenInlinedArrayCopyCharArray()
1144 LoadValueDirectFixed(rl_src, rs_rAX); in GenInlinedArrayCopyCharArray()
1195 LoadValueDirectFixed(rl_src, rs_rAX); in GenInlinedArrayCopyCharArray()
1992 RegLocation rl_src, rl_dest, rl_result; in GenAddReduceVector() local
1994 rl_src = mir_graph_->GetSrcWide(mir, 0); in GenAddReduceVector()
1997 rl_src = mir_graph_->GetSrc(mir, 0); in GenAddReduceVector()
2009 rl_src = LoadValue(rl_src, kFPReg); in GenAddReduceVector()
2014 OpRegCopy(rl_result.reg, rl_src.reg); in GenAddReduceVector()
2027 rl_src = LoadValueWide(rl_src, kFPReg); in GenAddReduceVector()
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/art/compiler/dex/quick/arm/
Dfp_arm.cc145 void ArmMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) { in GenConversion() argument
170 rl_src = LoadValueWide(rl_src, kFPReg); in GenConversion()
171 RegisterInfo* info = GetRegInfo(rl_src.reg); in GenConversion()
191 GenConversionCall(kQuickF2l, rl_dest, rl_src, kCoreReg); in GenConversion()
194 rl_src = LoadValueWide(rl_src, kFPReg); in GenConversion()
195 RegisterInfo* info = GetRegInfo(rl_src.reg); in GenConversion()
222 GenConversionCall(kQuickD2l, rl_dest, rl_src, kCoreReg); in GenConversion()
227 if (rl_src.wide) { in GenConversion()
228 rl_src = LoadValueWide(rl_src, kFPReg); in GenConversion()
229 src_reg = rl_src.reg.GetReg(); in GenConversion()
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Dint_arm.cc245 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); in GenSelect() local
248 RegisterClass src_reg_class = rl_src.ref ? kRefReg : kCoreReg; in GenSelect()
250 rl_src = LoadValue(rl_src, src_reg_class); in GenSelect()
264 OpRegRegImm(kOpSub, rl_result.reg, rl_src.reg, -true_val); in GenSelect()
270 OpRegRegImm(kOpRsub, rl_result.reg, rl_src.reg, 1); in GenSelect()
276 OpRegImm(kOpCmp, rl_src.reg, 0); in GenSelect()
287 OpRegImm(kOpCmp, rl_src.reg, 0); in GenSelect()
300 OpRegImm(kOpCmp, rl_src.reg, 0); in GenSelect()
520 RegLocation rl_src, RegLocation rl_dest, int lit) { in SmallLiteralDivRem() argument
532 rl_src = LoadValue(rl_src, kCoreReg); in SmallLiteralDivRem()
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Dcodegen_arm.h62 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
64 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
150 RegLocation rl_src, int scale, bool card_mark);
159 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
184 void GenMonitorEnter(int opt_flags, RegLocation rl_src);
185 void GenMonitorExit(int opt_flags, RegLocation rl_src);
187 void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,
189 void GenNegDouble(RegLocation rl_dest, RegLocation rl_src);
190 void GenNegFloat(RegLocation rl_dest, RegLocation rl_src);
191 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);
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Dcall_arm.cc56 void ArmMir2Lir::GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) { in GenLargeSparseSwitch() argument
68 rl_src = LoadValue(rl_src, kCoreReg); in GenLargeSparseSwitch()
88 OpRegReg(kOpCmp, r_key, rl_src.reg); in GenLargeSparseSwitch()
101 void ArmMir2Lir::GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) { in GenLargePackedSwitch() argument
113 rl_src = LoadValue(rl_src, kCoreReg); in GenLargePackedSwitch()
121 keyReg = rl_src.reg; in GenLargePackedSwitch()
124 OpRegRegImm(kOpSub, keyReg, rl_src.reg, low_key); in GenLargePackedSwitch()
147 void ArmMir2Lir::GenMonitorEnter(int opt_flags, RegLocation rl_src) { in GenMonitorEnter() argument
150 LoadValueDirectFixed(rl_src, rs_r0); // Get obj in GenMonitorEnter()
229 void ArmMir2Lir::GenMonitorExit(int opt_flags, RegLocation rl_src) { in GenMonitorExit() argument
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Dtarget_arm.cc993 RegLocation rl_src[3]; in GenMachineSpecificExtendedMethodMIR() local
995 rl_src[0] = rl_src[1] = rl_src[2] = mir_graph_->GetBadLoc(); in GenMachineSpecificExtendedMethodMIR()
999 rl_src[0] = mir_graph_->GetSrc(mir, 0); in GenMachineSpecificExtendedMethodMIR()
1000 rl_src[1] = mir_graph_->GetSrc(mir, 1); in GenMachineSpecificExtendedMethodMIR()
1001 rl_src[2]= mir_graph_->GetSrc(mir, 2); in GenMachineSpecificExtendedMethodMIR()
1002 GenMaddMsubInt(rl_dest, rl_src[0], rl_src[1], rl_src[2], false); in GenMachineSpecificExtendedMethodMIR()
1006 rl_src[0] = mir_graph_->GetSrc(mir, 0); in GenMachineSpecificExtendedMethodMIR()
1007 rl_src[1] = mir_graph_->GetSrc(mir, 1); in GenMachineSpecificExtendedMethodMIR()
1008 rl_src[2]= mir_graph_->GetSrc(mir, 2); in GenMachineSpecificExtendedMethodMIR()
1009 GenMaddMsubInt(rl_dest, rl_src[0], rl_src[1], rl_src[2], true); in GenMachineSpecificExtendedMethodMIR()
/art/compiler/dex/quick/mips/
Dfp_mips.cc133 RegLocation rl_src) { in GenConversion() argument
150 GenConversionCall(kQuickF2iz, rl_dest, rl_src, kCoreReg); in GenConversion()
153 GenConversionCall(kQuickD2iz, rl_dest, rl_src, kCoreReg); in GenConversion()
156 GenConversionCall(kQuickL2d, rl_dest, rl_src, kFPReg); in GenConversion()
159 GenConversionCall(kQuickF2l, rl_dest, rl_src, kCoreReg); in GenConversion()
162 GenConversionCall(kQuickL2f, rl_dest, rl_src, kFPReg); in GenConversion()
165 GenConversionCall(kQuickD2l, rl_dest, rl_src, kCoreReg); in GenConversion()
170 if (rl_src.wide) { in GenConversion()
171 rl_src = LoadValueWide(rl_src, kFPReg); in GenConversion()
173 rl_src = LoadValue(rl_src, kFPReg); in GenConversion()
[all …]
Dint_mips.cc429 void MipsMir2Lir::GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit, in GenMultiplyByTwoBitMultiplier() argument
433 OpRegRegImm(kOpLsl, t_reg, rl_src.reg, second_bit - first_bit); in GenMultiplyByTwoBitMultiplier()
434 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, t_reg); in GenMultiplyByTwoBitMultiplier()
466 RegLocation rl_src, RegLocation rl_dest, int lit) { in SmallLiteralDivRem() argument
467 UNUSED(dalvik_opcode, is_div, rl_src, rl_dest, lit); in SmallLiteralDivRem()
472 bool MipsMir2Lir::EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) { in EasyMultiply() argument
473 UNUSED(rl_src, rl_dest, lit); in EasyMultiply()
609 void MipsMir2Lir::GenNotLong(RegLocation rl_dest, RegLocation rl_src) { in GenNotLong() argument
610 rl_src = LoadValueWide(rl_src, kCoreReg); in GenNotLong()
612 OpRegReg(kOpMvn, rl_result.reg, rl_src.reg); in GenNotLong()
[all …]
Dcodegen_mips.h73 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
75 bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE;
149 RegLocation rl_src, int scale, bool card_mark);
158 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
166 void GenIntToLong(RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
186 void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit,
188 void GenNegDouble(RegLocation rl_dest, RegLocation rl_src);
189 void GenNegFloat(RegLocation rl_dest, RegLocation rl_src);
190 void GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
191 void GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
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Dcall_mips.cc72 void MipsMir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargeSparseSwitch() argument
113 rl_src = LoadValue(rl_src, kCoreReg); in GenLargeSparseSwitch()
121 OpCmpBranch(kCondNe, rl_src.reg, r_key, loop_label); in GenLargeSparseSwitch()
145 void MipsMir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargePackedSwitch() argument
157 rl_src = LoadValue(rl_src, kCoreReg); in GenLargePackedSwitch()
164 r_key = rl_src.reg; in GenLargePackedSwitch()
181 OpRegRegReg(kOpSub, r_key, rl_src.reg, r_key); in GenLargePackedSwitch()
183 OpRegRegImm(kOpSub, r_key, rl_src.reg, low_key); in GenLargePackedSwitch()