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Searched refs:ARM_AM (Results 1 – 23 of 23) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp178 int Offset = isAM3 ? ARM_AM::getAM3Offset(OffField) in getMemoryOpOffset()
179 : ARM_AM::getAM5Offset(OffField) * 4; in getMemoryOpOffset()
180 ARM_AM::AddrOpc Op = isAM3 ? ARM_AM::getAM3Op(OffField) in getMemoryOpOffset()
181 : ARM_AM::getAM5Op(OffField); in getMemoryOpOffset()
183 if (Op == ARM_AM::sub) in getMemoryOpOffset()
189 static int getLoadStoreMultipleOpcode(int Opcode, ARM_AM::AMSubMode Mode) { in getLoadStoreMultipleOpcode()
196 case ARM_AM::ia: return ARM::LDMIA; in getLoadStoreMultipleOpcode()
197 case ARM_AM::da: return ARM::LDMDA; in getLoadStoreMultipleOpcode()
198 case ARM_AM::db: return ARM::LDMDB; in getLoadStoreMultipleOpcode()
199 case ARM_AM::ib: return ARM::LDMIB; in getLoadStoreMultipleOpcode()
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DARMSelectionDAGInfo.h22 namespace ARM_AM {
25 default: return ARM_AM::no_shift; in getShiftOpcForNode()
26 case ISD::SHL: return ARM_AM::lsl; in getShiftOpcForNode()
27 case ISD::SRL: return ARM_AM::lsr; in getShiftOpcForNode()
28 case ISD::SRA: return ARM_AM::asr; in getShiftOpcForNode()
29 case ISD::ROTR: return ARM_AM::ror; in getShiftOpcForNode()
DARMISelDAGToDAG.cpp95 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
190 return ARM_AM::getSOImmVal(Imm) != -1; in is_so_imm()
194 return ARM_AM::getSOImmVal(~Imm) != -1; in is_so_imm_not()
198 return ARM_AM::getT2SOImmVal(Imm) != -1; in is_t2_so_imm()
202 return ARM_AM::getT2SOImmVal(~Imm) != -1; in is_t2_so_imm_not()
456 ARM_AM::ShiftOpc ShOpcVal, in isShifterOpProfitable()
463 return ShOpcVal == ARM_AM::lsl && in isShifterOpProfitable()
474 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode()); in SelectImmShifterOperand()
478 if (ShOpcVal == ARM_AM::no_shift) return false; in SelectImmShifterOperand()
485 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
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DARMBaseInstrInfo.cpp171 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress()
172 unsigned Amt = ARM_AM::getAM2Offset(OffImm); in convertToThreeAddress()
174 if (ARM_AM::getSOImmVal(Amt) == -1) in convertToThreeAddress()
183 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm); in convertToThreeAddress()
184 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
197 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress()
198 unsigned Amt = ARM_AM::getAM3Offset(OffImm); in convertToThreeAddress()
1962 unsigned RotAmt = ARM_AM::getSOImmValRotate(NumBytes); in emitARMRegPlusImmediate()
1963 unsigned ThisVal = NumBytes & ARM_AM::rotr32(0xFF, RotAmt); in emitARMRegPlusImmediate()
1969 assert(ARM_AM::getSOImmVal(ThisVal) != -1 && "Bit extraction didn't work?"); in emitARMRegPlusImmediate()
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DThumb2InstrInfo.cpp239 ARM_AM::getT2SOImmVal(NumBytes) == -1) { in emitT2RegPlusImmediate()
299 if (ARM_AM::getT2SOImmVal(NumBytes) != -1) { in emitT2RegPlusImmediate()
304 ThisVal = ThisVal & ARM_AM::rotr32(0xff000000U, RotAmt); in emitT2RegPlusImmediate()
306 assert(ARM_AM::getT2SOImmVal(ThisVal) != -1 && in emitT2RegPlusImmediate()
312 if (ARM_AM::getT2SOImmVal(NumBytes) != -1) { in emitT2RegPlusImmediate()
321 ThisVal = ThisVal & ARM_AM::rotr32(0xff000000U, RotAmt); in emitT2RegPlusImmediate()
323 assert(ARM_AM::getT2SOImmVal(ThisVal) != -1 && in emitT2RegPlusImmediate()
484 if (ARM_AM::getT2SOImmVal(Offset) != -1) { in rewriteT2FrameIndex()
510 unsigned ThisImmVal = Offset & ARM_AM::rotr32(0xff000000U, RotAmt); in rewriteT2FrameIndex()
515 assert(ARM_AM::getT2SOImmVal(ThisImmVal) != -1 && in rewriteT2FrameIndex()
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DARMFastISel.cpp165 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy);
478 Imm = ARM_AM::getFP64Imm(Val); in ARMMaterializeFP()
481 Imm = ARM_AM::getFP32Imm(Val); in ARMMaterializeFP()
533 bool UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) : in ARMMaterializeInt()
534 (ARM_AM::getSOImmVal(Imm) != -1); in ARMMaterializeInt()
1395 UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) : in ARMEmitCmp()
1396 (ARM_AM::getSOImmVal(Imm) != -1); in ARMEmitCmp()
1650 UseImm = isThumb2 ? (ARM_AM::getT2SOImmVal(Imm) != -1) : in SelectSelect()
1651 (ARM_AM::getSOImmVal(Imm) != -1); in SelectSelect()
2629 /* 1 bit sext */ { { ARM::MOVsi , 1, ARM_AM::asr , 31 }, in ARMEmitIntExt()
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DARMBaseRegisterInfo.cpp448 InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); in getFrameIndexInstrOffset()
449 if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) in getFrameIndexInstrOffset()
456 InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(ImmIdx).getImm()); in getFrameIndexInstrOffset()
457 if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) in getFrameIndexInstrOffset()
463 InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(ImmIdx).getImm()); in getFrameIndexInstrOffset()
464 if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) in getFrameIndexInstrOffset()
DARMTargetTransformInfo.cpp29 (ARM_AM::getSOImmVal(ZImmVal) != -1) || in getIntImmCost()
30 (ARM_AM::getSOImmVal(~ZImmVal) != -1)) in getIntImmCost()
36 (ARM_AM::getT2SOImmVal(ZImmVal) != -1) || in getIntImmCost()
37 (ARM_AM::getT2SOImmVal(~ZImmVal) != -1)) in getIntImmCost()
44 if ((~ZImmVal < 256) || ARM_AM::isThumbImmShiftedVal(ZImmVal)) in getIntImmCost()
DARMMCInstLower.cpp156 int32_t Enc = ARM_AM::getSOImmVal(MCOp.getImm()); in LowerARMMachineInstrToMCInst()
DARMExpandPseudoInsts.cpp678 unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal); in ExpandMOV32BitImm()
679 unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal); in ExpandMOV32BitImm()
912 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? in ExpandMI()
913 ARM_AM::lsr : ARM_AM::asr), in ExpandMI()
925 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) in ExpandMI()
DARMFrameLowering.cpp265 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsr, NrBitsToZero)))); in emitAligningInstructions()
269 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, NrBitsToZero)))); in emitAligningInstructions()
1080 MIB.addImm(ARM_AM::getAM2Opc(ARM_AM::add, 4, ARM_AM::no_shift)); in emitPopInst()
DARMISelLowering.cpp3881 unsigned EncodedVal = ARM_AM::createNEONModImm(0x6, 0x80); in LowerFCOPYSIGN()
3904 SDValue AllOnes = DAG.getTargetConstant(ARM_AM::createNEONModImm(0xe, 0xff), in LowerFCOPYSIGN()
4614 unsigned EncodedVal = ARM_AM::createNEONModImm(OpCmode, Imm); in isNEONModifiedImm()
4633 int ImmVal = IsDouble ? ARM_AM::getFP64Imm(FPVal) : ARM_AM::getFP32Imm(FPVal); in LowerConstantFP()
4962 if (ARM_AM::getSOImmVal(Val) != -1 || ARM_AM::getSOImmVal(~Val) != -1) in IsSingleInstrConstant()
5005 int ImmVal = ARM_AM::getFP32Imm(SplatBits); in LowerBUILD_VECTOR()
6638 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
6778 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
7325 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter()
7326 Offset = ARM_AM::getAM2Offset(Offset); in EmitInstrWithCustomInserter()
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DARMInstrThumb.td59 return ARM_AM::isThumbImmShiftedVal((unsigned)N->getZExtValue());
63 unsigned V = ARM_AM::getThumbImmNonShiftedVal((unsigned)N->getZExtValue());
68 unsigned V = ARM_AM::getThumbImmValShift((unsigned)N->getZExtValue());
DARMInstrVFP.td36 return ARM_AM::getFP32Imm(N->getValueAPF()) != -1;
39 uint32_t enc = ARM_AM::getFP32Imm(InVal);
48 return ARM_AM::getFP64Imm(N->getValueAPF()) != -1;
51 uint32_t enc = ARM_AM::getFP64Imm(InVal);
DARMInstrThumb2.td79 return ARM_AM::getT2SOImmVal(Imm) != -1;
93 return ARM_AM::getT2SOImmVal(~((uint32_t)N->getZExtValue())) != -1;
104 return ARM_AM::getT2SOImmVal(~N16bitSignExt) != -1;
113 return Value && ARM_AM::getT2SOImmVal(Value) != -1;
DARMInstrInfo.td575 return ARM_AM::getSOImmVal(Imm) != -1;
589 return ARM_AM::getSOImmVal(~(uint32_t)N->getZExtValue()) != -1;
597 return Value && ARM_AM::getSOImmVal(Value) != -1;
606 return ARM_AM::isSOImmTwoPartVal((unsigned)N->getZExtValue());
DARMInstrNEON.td598 uint64_t EltVal = ARM_AM::decodeNEONModImm(ConstVal->getZExtValue(), EltBits);
605 uint64_t EltVal = ARM_AM::decodeNEONModImm(ConstVal->getZExtValue(), EltBits);
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp194 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm(); in getLdStmModeOpValue()
197 case ARM_AM::da: return 0; in getLdStmModeOpValue()
198 case ARM_AM::ia: return 1; in getLdStmModeOpValue()
199 case ARM_AM::db: return 2; in getLdStmModeOpValue()
200 case ARM_AM::ib: return 3; in getLdStmModeOpValue()
205 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const { in getShiftOp()
207 case ARM_AM::no_shift: in getShiftOp()
208 case ARM_AM::lsl: return 0; in getShiftOp()
209 case ARM_AM::lsr: return 1; in getShiftOp()
210 case ARM_AM::asr: return 2; in getShiftOp()
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DARMAddressingModes.h26 namespace ARM_AM {
48 case ARM_AM::asr: return "asr"; in getShiftOpcStr()
49 case ARM_AM::lsl: return "lsl"; in getShiftOpcStr()
50 case ARM_AM::lsr: return "lsr"; in getShiftOpcStr()
51 case ARM_AM::ror: return "ror"; in getShiftOpcStr()
52 case ARM_AM::rrx: return "rrx"; in getShiftOpcStr()
59 case ARM_AM::asr: return 2; in getShiftOpcEncoding()
60 case ARM_AM::lsl: return 0; in getShiftOpcEncoding()
61 case ARM_AM::lsr: return 1; in getShiftOpcEncoding()
62 case ARM_AM::ror: return 3; in getShiftOpcEncoding()
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DARMAsmBackend.cpp396 if (Ctx && ARM_AM::getSOImmVal(Value) == -1) in adjustFixupValue()
399 return ARM_AM::getSOImmVal(Value) | (opc << 21); in adjustFixupValue()
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp42 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc, in printRegImmShift()
44 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
48 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0"); in printRegImmShift()
51 if (ShOpc != ARM_AM::rrx) { in printRegImmShift()
120 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); in printInst()
131 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); in printInst()
142 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); in printInst()
151 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { in printInst()
157 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">"); in printInst()
397 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand()
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/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp204 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
491 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg
501 ARM_AM::ShiftOpc ShiftTy;
511 ARM_AM::ShiftOpc ShiftTy;
518 ARM_AM::ShiftOpc ShiftTy;
783 int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue())); in isFPImm()
1054 return (ARM_AM::getSOImmVal(Value) != -1 || in isAdrLabel()
1055 ARM_AM::getSOImmVal(-Value) != -1);; in isAdrLabel()
1062 return ARM_AM::getT2SOImmVal(Value) != -1; in isT2SOImm()
1069 return ARM_AM::getT2SOImmVal(Value) == -1 && in isT2SOImmNot()
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/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1152 ARM_AM::ShiftOpc Shift = ARM_AM::lsl; in DecodeSORegImmOperand()
1155 Shift = ARM_AM::lsl; in DecodeSORegImmOperand()
1158 Shift = ARM_AM::lsr; in DecodeSORegImmOperand()
1161 Shift = ARM_AM::asr; in DecodeSORegImmOperand()
1164 Shift = ARM_AM::ror; in DecodeSORegImmOperand()
1168 if (Shift == ARM_AM::ror && imm == 0) in DecodeSORegImmOperand()
1169 Shift = ARM_AM::rrx; in DecodeSORegImmOperand()
1191 ARM_AM::ShiftOpc Shift = ARM_AM::lsl; in DecodeSORegRegOperand()
1194 Shift = ARM_AM::lsl; in DecodeSORegRegOperand()
1197 Shift = ARM_AM::lsr; in DecodeSORegRegOperand()
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