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Searched refs:CCState (Results 1 – 25 of 37) sorted by relevance

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/external/llvm/lib/CodeGen/
DCallingConvLower.cpp28 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, in CCState() function in CCState
43 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, in HandleByVal()
61 void CCState::MarkAllocated(unsigned Reg) { in MarkAllocated()
69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
138 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, in AnalyzeCallOperands()
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
174 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
[all …]
/external/llvm/lib/Target/Mips/
DMipsCCState.h21 class MipsCCState : public CCState {
70 : CCState(CC, isVarArg, MF, locs, C), SpecialCallingConv(SpecialCC) {} in CCState() function
78 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
96 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
105 CCState::AnalyzeCallResult(Ins, Fn); in AnalyzeCallResult()
113 CCState::AnalyzeReturn(Outs, Fn); in AnalyzeReturn()
121 bool Return = CCState::CheckReturn(ArgsFlags, Fn); in CheckReturn()
DMips16ISelLowering.h35 const CCState &CCInfo, unsigned NextStackOffset,
DMipsISelLowering.h264 void HandleByVal(CCState *, unsigned &, unsigned) const override;
424 isEligibleForTailCallOptimization(const CCState &CCInfo,
451 SDLoc DL, SelectionDAG &DAG, CCState &State) const;
DMipsSEISelLowering.h55 const CCState &CCInfo, unsigned NextStackOffset,
DMipsFastISel.cpp198 CCState &State) LLVM_ATTRIBUTE_UNUSED;
202 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32()
208 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
948 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1081 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
DMipsISelLowering.cpp2325 CCState &State, ArrayRef<MCPhysReg> F64Regs) { in CC_MipsO32()
2414 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32()
2422 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
2430 CCState &State) LLVM_ATTRIBUTE_UNUSED;
3713 CCState &State) const { in writeVarArgRegs()
3758 void MipsTargetLowering::HandleByVal(CCState *State, unsigned &Size, in HandleByVal()
/external/llvm/lib/Target/ARM/
DARMCallingConv.h30 CCState &State, bool CanFail) { in f64AssignAPCS()
61 CCState &State) { in CC_ARM_APCS_Custom_f64()
73 CCState &State, bool CanFail) { in f64AssignAAPCS()
115 CCState &State) { in CC_ARM_AAPCS_Custom_f64()
125 CCValAssign::LocInfo &LocInfo, CCState &State) { in f64RetAssign()
147 CCState &State) { in RetCC_ARM_APCS_Custom_f64()
158 CCState &State) { in RetCC_ARM_AAPCS_Custom_f64()
183 CCState &State) { in CC_ARM_AAPCS_Custom_Aggregate()
DARMISelLowering.h531 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
538 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
549 void HandleByVal(CCState *, unsigned &, unsigned) const override;
DARMFastISel.cpp1888 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs()
2037 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context); in FinishCall()
2098 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext()); in SelectRet()
2203 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in ARMEmitLibcall()
2314 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context); in SelectCall()
/external/llvm/lib/Target/X86/
DX86CallingConv.h27 CCState &State) { in CC_X86_32_VectorCallIndirect()
38 CCState &) { in CC_X86_AnyReg_Error() argument
/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h25 class CCState; variable
176 ISD::ArgFlagsTy ArgFlags, CCState &State);
183 ISD::ArgFlagsTy &ArgFlags, CCState &State);
193 class CCState {
260 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h46 CCState &State, unsigned SlotAlign) { in finishStackBlock()
69 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block()
88 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block()
DAArch64ISelLowering.h400 void saveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL,
/external/llvm/lib/Target/PowerPC/
DPPCCallingConv.h25 CCState &) { in CC_PPC_AnyReg_Error() argument
DPPCISelLowering.h845 CCState &State);
851 CCState &State);
857 CCState &State);
DPPCFastISel.cpp1251 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1371 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); in finishCall()
1460 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, *Context); in fastLowerCall()
1579 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, *Context); in SelectRet()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp269 static void AnalyzeVarArgs(CCState &State, in AnalyzeVarArgs()
274 static void AnalyzeVarArgs(CCState &State, in AnalyzeVarArgs()
284 static void AnalyzeArguments(CCState &State, in AnalyzeArguments()
349 static void AnalyzeRetResult(CCState &State, in AnalyzeRetResult()
354 static void AnalyzeRetResult(CCState &State, in AnalyzeRetResult()
360 static void AnalyzeReturnValues(CCState &State, in AnalyzeReturnValues()
443 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
539 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
589 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
726 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp49 class HexagonCCState : public CCState {
56 : CCState(CC, isVarArg, MF, locs, C), in HexagonCCState()
67 ISD::ArgFlagsTy ArgFlags, CCState &State);
72 ISD::ArgFlagsTy ArgFlags, CCState &State);
77 ISD::ArgFlagsTy ArgFlags, CCState &State);
82 ISD::ArgFlagsTy ArgFlags, CCState &State);
87 ISD::ArgFlagsTy ArgFlags, CCState &State);
92 ISD::ArgFlagsTy ArgFlags, CCState &State);
97 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg()
147 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon()
[all …]
/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp207 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
283 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
399 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
444 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); in LowerCallResult()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp41 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet()
54 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64()
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full()
128 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half()
193 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_32()
253 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn_64()
352 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_32()
552 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_64()
701 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall_32()
938 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCall_32()
[all …]
/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.h109 void AnalyzeFormalArguments(CCState &State,
/external/clang/lib/CodeGen/
DTargetInfo.cpp558 struct CCState { struct
559 CCState(unsigned CC) : CC(CC), FreeRegs(0), FreeSSERegs(0) {} in CCState() function
599 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const;
601 ABIArgInfo getIndirectReturnResult(CCState &State) const;
607 ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const;
608 ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const;
609 bool shouldUseInReg(QualType Ty, CCState &State, bool &NeedsPadding) const;
807 ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(CCState &State) const { in getIndirectReturnResult()
817 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, CCState &State) const { in classifyReturnType()
947 CCState &State) const { in getIndirectResult()
[all …]
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1129 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
1140 CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCCCCallTo()
1295 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
1453 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
1477 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerReturn()
/external/llvm/include/llvm/Target/
DTargetLowering.h45 class CCState; variable
2384 virtual void HandleByVal(CCState *, unsigned &, unsigned) const {} in HandleByVal() argument

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