Home
last modified time | relevance | path

Searched refs:CmpOpc (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp712 Mips16TargetLowering::emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc, in emitFEXT_T8I816_ins() argument
721 BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(CmpOpc)).addReg(regX) in emitFEXT_T8I816_ins()
737 unsigned CmpOpc; in emitFEXT_T8I8I16_ins() local
739 CmpOpc = CmpiOpc; in emitFEXT_T8I8I16_ins()
742 CmpOpc = CmpiXOpc; in emitFEXT_T8I8I16_ins()
745 BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(CmpOpc)).addReg(regX) in emitFEXT_T8I8I16_ins()
DMips16ISelLowering.h64 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp807 unsigned CmpOpc; in PPCEmitCmp() local
812 CmpOpc = PPC::FCMPUS; in PPCEmitCmp()
815 CmpOpc = PPC::FCMPUD; in PPCEmitCmp()
824 CmpOpc = IsZExt ? PPC::CMPLW : PPC::CMPW; in PPCEmitCmp()
826 CmpOpc = IsZExt ? PPC::CMPLWI : PPC::CMPWI; in PPCEmitCmp()
830 CmpOpc = IsZExt ? PPC::CMPLD : PPC::CMPD; in PPCEmitCmp()
832 CmpOpc = IsZExt ? PPC::CMPLDI : PPC::CMPDI; in PPCEmitCmp()
862 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc), DestReg) in PPCEmitCmp()
865 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc), DestReg) in PPCEmitCmp()
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp1404 unsigned CmpOpc; in ARMEmitCmp() local
1412 CmpOpc = UseImm ? ARM::VCMPEZS : ARM::VCMPES; in ARMEmitCmp()
1416 CmpOpc = UseImm ? ARM::VCMPEZD : ARM::VCMPED; in ARMEmitCmp()
1426 CmpOpc = ARM::t2CMPrr; in ARMEmitCmp()
1428 CmpOpc = isNegativeImm ? ARM::t2CMNri : ARM::t2CMPri; in ARMEmitCmp()
1431 CmpOpc = ARM::CMPrr; in ARMEmitCmp()
1433 CmpOpc = isNegativeImm ? ARM::CMNri : ARM::CMPri; in ARMEmitCmp()
1457 const MCInstrDesc &II = TII.get(CmpOpc); in ARMEmitCmp()
1660 unsigned CmpOpc = isThumb2 ? ARM::t2CMPri : ARM::CMPri; in SelectSelect() local
1661 CondReg = constrainOperandRegClass(TII.get(CmpOpc), CondReg, 0); in SelectSelect()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp8566 unsigned CmpOpc = Cmp.getOpcode(); in performBRCONDCombine() local
8567 if (CmpOpc != AArch64ISD::ADDS && CmpOpc != AArch64ISD::SUBS) in performBRCONDCombine()