/external/libhevc/decoder/arm/ |
D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 226 VQMOVUN.S16 D14,Q7 231 VZIP.8 D14,D15 248 VST1.32 D14,[R2]! 277 VQMOVUN.S16 D14,Q7 282 VZIP.8 D14,D15 299 VST1.32 D14,[R8]! 357 VQMOVUN.S16 D14,Q7 362 VZIP.8 D14,D15 379 VST1.32 D14,[R2]! 399 VQMOVUN.S16 D14,Q7 [all …]
|
/external/libhevc/common/arm/ |
D | ihevc_sao_band_offset_chroma.s | 166 VCLE.U8 D14,D3,D30 @vcle_u8(band_table.val[2], vdup_n_u8(16)) 168 VORR.U8 D3,D3,D14 @band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp) 180 VAND.U8 D3,D3,D14 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp) 207 …VADD.I8 D14,D10,D30 @band_table_v.val[1] = vadd_u8(band_table_v.val[1], band_p… 219 …VADD.I8 D10,D14,D28 @band_table_v.val[1] = vadd_u8(band_table_v.val[1], vdup_n… 289 VLD2.8 {D13,D14},[r5] @vld1q_u8(pu1_src_cpy) 299 VSUB.I8 D16,D14,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v) 307 …VTBX.8 D14,{D9-D12},D16 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(… 316 VST2.8 {D13,D14},[r5] @vst1q_u8(pu1_src_cpy, au1_cur_row) 343 VLD2.8 {D13,D14},[r5] @vld1q_u8(pu1_src_cpy) [all …]
|
D | ihevc_sao_edge_offset_class0_chroma.s | 176 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_… 184 …VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_… 203 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) 211 VUZP.8 D14,D15 214 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl_u, vget_low_s8(edge_idx)) 239 VMOVN.I16 D14,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0]) 261 VST1.8 {D14,D15},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row) 336 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_… 343 …VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_… 368 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) [all …]
|
D | ihevc_sao_edge_offset_class0.s | 173 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_… 202 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) 210 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 302 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_…
|
D | ihevc_sao_band_offset_luma.s | 200 VSUB.I8 D14,D13,D31 @vsub_u8(au1_cur_row, band_pos) 202 …VTBX.8 D13,{D1-D4},D14 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
|
D | ihevc_sao_edge_offset_class2_chroma.s | 394 …VMOV.8 D14[0],r8 @I sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] -… 398 …VMOV.8 D14[1],r4 @I sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_l… 480 …VMOV.8 D14[0],r8 @II sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] … 496 …VMOV.8 D14[1],r11 @II sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_… 533 …VMOV.8 D14[1],r10 @III sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src… 617 …VMOV.8 D14[0],r8 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - p… 628 …VMOV.8 D14[1],r4 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_lef…
|
D | ihevc_sao_edge_offset_class2.s | 290 …VMOV.8 D14[0],r4 @I sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] -… 372 …VMOV.8 D14[0],r4 @II sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] … 390 …VMOV.8 D14[0],r2 @III sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0]… 467 …VMOV.8 D14[0],r4 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - p…
|
/external/llvm/test/MC/MachO/ |
D | x86_32-symbols.s | 47 D14: label
|
/external/llvm/lib/Target/ARM/ |
D | ARMBaseRegisterInfo.h | 63 case D15: case D14: case D13: case D12: in isARMArea3Register()
|
D | ARMRegisterInfo.td | 114 def D14 : ARMReg<14, "d14", [S28, S29]>, DwarfRegNum<[270]>; 145 def Q7 : ARMReg< 7, "q7", [D14, D15]>;
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.td | 105 def D14 : Rd<28, "r29:28", [R28, R29]>, DwarfRegNum<[60]>; 174 (sequence "D%u", 6, 13), D5, D14, D15)>;
|
D | HexagonRegisterInfo.cpp | 68 Reserved.set(Hexagon::D14); in getReservedRegs()
|
/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 143 def D14 : Rd<28, "F28", [F28, F29]>, DwarfRegNum<[86]>; 173 def Q7 : Rq<28, "F28", [D14, D15]>;
|
/external/llvm/lib/Target/Hexagon/Disassembler/ |
D | HexagonDisassembler.cpp | 157 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15 in DecodeDoubleRegsRegisterClass()
|
/external/valgrind/memcheck/ |
D | mc_machine.c | 888 if (o >= GOF(D14) && o+sz <= GOF(D14)+SZB(D14)) return GOF(D14); in get_otrack_shadow_offset_wrk() 917 if (o >= GOF(D14) && o+sz <= GOF(D14)+2*SZB(D14)) return GOF(D14); // Q7 in get_otrack_shadow_offset_wrk()
|
/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 125 case AArch64::D14: return AArch64::B14; in getBRegFromDReg() 165 case AArch64::B14: return AArch64::D14; in getDRegFromBReg()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64CallingConvention.td | 236 CCIfType<[f64], CCAssignToReg<[D12, D13, D14, D15]>>, 256 D12, D13, D14, D15)>;
|
D | AArch64PBQPRegAlloc.cpp | 120 case AArch64::D14: in isOdd()
|
D | AArch64RegisterInfo.td | 330 def D14 : AArch64Reg<14, "d14", [S14], ["v14", ""]>, DwarfRegAlias<B14>; 365 def Q14 : AArch64Reg<14, "q14", [D14], ["v14", ""]>, DwarfRegAlias<B14>;
|
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AsmBackend.cpp | 426 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15) in generateCompactUnwindEncoding()
|
/external/llvm/lib/Target/Sparc/Disassembler/ |
D | SparcDisassembler.cpp | 94 SP::D14, SP::D30, SP::D15, SP::D31 };
|
/external/libavc/encoder/arm/ |
D | ime_distortion_metrics_a9q.s | 900 @;Q7 -> D14:D15 910 @;D14 : sad_left 931 @;D14 : sad_left
|
/external/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 115 Sparc::D12, Sparc::D13, Sparc::D14, Sparc::D15,
|
/external/llvm/lib/Target/Mips/ |
D | MipsRegisterInfo.td | 368 D10, D11, D12, D13, D14, D15)>;
|
/external/libavc/common/arm/ |
D | ih264_deblk_chroma_a9.s | 926 vmov.i16 d15, d28 @D14 has cliptab values for U, D15 for V 947 vadd.i8 d14, d14, d30 @D14 = C = C0+1 for U
|