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/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_rgba8888.s229 VMOV.I8 D17,#0
232 VZIP.8 D16,D17
253 VST1.32 D17,[R2]!
280 VMOV.I8 D17,#0
283 VZIP.8 D16,D17
304 VST1.32 D17,[R8]!
360 VMOV.I8 D17,#0
363 VZIP.8 D16,D17
384 VST1.32 D17,[R2]!
402 VMOV.I8 D17,#0
[all …]
/external/libhevc/common/arm/
Dihevc_sao_band_offset_chroma.s232 VCLE.U8 D17,D12,D29 @vcle_u8(band_table.val[3], vdup_n_u8(16))
234 VORR.U8 D12,D12,D17 @band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
244 VAND.U8 D12,D12,D17 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp)
292 VLD2.8 {D17,D18},[r6] @vld1q_u8(pu1_src_cpy)
302 VSUB.I8 D19,D17,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u)
314 …VTBX.8 D17,{D1-D4},D19 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(…
322 VST2.8 {D17,D18},[r6],r1 @vst1q_u8(pu1_src_cpy, au1_cur_row)
346 VLD2.8 {D17,D18},[r6] @vld1q_u8(pu1_src_cpy)
356 VSUB.I8 D19,D17,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u)
364 …VTBX.8 D17,{D1-D4},D19 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(…
[all …]
Dihevc_sao_band_offset_luma.s197 VLD1.8 D17,[r6] @au1_cur_row = vld1_u8(pu1_src_cpy)
206 VSUB.I8 D18,D17,D31 @vsub_u8(au1_cur_row, band_pos)
208 …VTBX.8 D17,{D1-D4},D18 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
217 VST1.8 D17,[r6],r1 @vst1_u8(pu1_src_cpy, au1_cur_row)
Dihevc_sao_edge_offset_class0_chroma.s218 VTBL.8 D17,{D0},D15
221 VZIP.S8 D16,D17
233 …VADDW.S8 Q6,Q6,D17 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
383 VTBL.8 D17,{D0},D15
386 VZIP.S8 D16,D17
Dihevc_sao_edge_offset_class2.s270 VLD1.8 D17,[r8] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
335 VLD1.8 D17,[r8] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
423 …VMOVL.U8 Q9,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
449 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
582 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
712 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
Dihevc_sao_edge_offset_class3.s281 VLD1.8 D17,[r8] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
351 VLD1.8 D17,[r8] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
449 …VMOVL.U8 Q11,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
476 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
610 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
748 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
Dihevc_sao_edge_offset_class2_chroma.s360 VLD1.8 D17,[r8] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
445 VLD1.8 D17,[r8] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
572 …VMOVL.U8 Q9,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
593 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
742 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
886 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
Dihevc_sao_edge_offset_class3_chroma.s356 VLD1.8 D17,[r11] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
441 VLD1.8 D17,[r11] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
558 …VMOVL.U8 Q9,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
595 VLD1.8 D17,[r11] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
749 VLD1.8 D17,[r9] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
914 VLD1.8 D17,[r9] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
Dihevc_sao_edge_offset_class0.s224 VTBL.8 D17,{D11},D15 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
228 …VADDW.S8 Q7,Q7,D17 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
/external/llvm/test/MC/MachO/
Dx86_64-symbols.s56 D17: label
Dx86_32-symbols.s56 D17: label
/external/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td149 def D17 : SparcReg< 3, "F34">;
174 def Q8 : Rq< 1, "F32", [D16, D17]>;
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h128 case AArch64::D17: return AArch64::B17; in getBRegFromDReg()
168 case AArch64::B17: return AArch64::D17; in getDRegFromBReg()
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp72 case AArch64::D17: in isOdd()
DAArch64RegisterInfo.td333 def D17 : AArch64Reg<17, "d17", [S17], ["v17", ""]>, DwarfRegAlias<B17>;
368 def Q17 : AArch64Reg<17, "q17", [D17], ["v17", ""]>, DwarfRegAlias<B17>;
/external/llvm/lib/Target/ARM/
DARMRegisterInfo.td120 def D17 : ARMFReg<17, "d17">, DwarfRegNum<[273]>;
148 def Q8 : ARMReg< 8, "q8", [D16, D17]>;
/external/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp87 SP::D0, SP::D16, SP::D1, SP::D17,
/external/valgrind/memcheck/
Dmc_machine.c891 if (o >= GOF(D17) && o+sz <= GOF(D17)+SZB(D17)) return GOF(D17); in get_otrack_shadow_offset_wrk()
/external/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp116 Sparc::D16, Sparc::D17, Sparc::D18, Sparc::D19,
/external/libavc/common/arm/
Dih264_deblk_chroma_a9.s725 vdup.8 d17, r6 @D17 contains beta_cr
913 vld1.32 d17[0], [r9] @D17[0] contains cliptab_cr
/external/icu/icu4c/source/test/testdata/
Didna_conf.txt300 namebase: <0D15><0D16><0D17>
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/
DIDNATestInput.txt300 namebase: <0D15><0D16><0D17>
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp280 AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19,
/external/libavc/encoder/arm/
Dime_distortion_metrics_a9q.s1069 @D17 S12 S34 A12 A34
/external/icu/icu4c/source/data/unidata/norm2/
Dnfkc_cf.txt616 10B7>2D17
675 1D55>1D17

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