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/external/icu/icu4c/source/test/letest/
Dletest.sln3 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "letest", "letest.vcproj", "{67351485-4D18-4245…
18 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|Win32.ActiveCfg = Debug|Win32
19 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|Win32.Build.0 = Debug|Win32
20 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|x64.ActiveCfg = Debug|x64
21 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|x64.Build.0 = Debug|x64
22 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|Win32.ActiveCfg = Release|Win32
23 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|Win32.Build.0 = Release|Win32
24 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|x64.ActiveCfg = Release|x64
25 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|x64.Build.0 = Release|x64
/external/libhevc/common/arm/
Dihevc_sao_band_offset_chroma.s240 VCLE.U8 D18,D11,D29 @vcle_u8(band_table.val[2], vdup_n_u8(16))
242 VORR.U8 D11,D11,D18 @band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
254 VAND.U8 D11,D11,D18 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp)
292 VLD2.8 {D17,D18},[r6] @vld1q_u8(pu1_src_cpy)
305 VSUB.I8 D20,D18,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
318 …VTBX.8 D18,{D9-D12},D20 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
322 VST2.8 {D17,D18},[r6],r1 @vst1q_u8(pu1_src_cpy, au1_cur_row)
346 VLD2.8 {D17,D18},[r6] @vld1q_u8(pu1_src_cpy)
359 VSUB.I8 D20,D18,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
370 …VTBX.8 D18,{D9-D12},D20 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
[all …]
Dihevc_sao_edge_offset_class2.s275 …VMOV.8 D18[0],r5 @I pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd +…
300 VTBL.8 D18,{D6},D24 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
306 VTBL.8 D10,{D7},D18 @I offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
353 …VMOV.8 D18[0],r8 @III pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd…
397 VTBL.8 D18,{D6},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
408 … VTBL.8 D10,{D7},D18 @III offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
454 …VMOV.8 D18[0],r5 @pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd + 1…
473 VTBL.8 D18,{D6},D18 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
481 VTBL.8 D10,{D7},D18 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
586 …VMOV.8 D18[0],r5 @pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd + 1…
Dihevc_sao_edge_offset_class1.s142 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
156 …VMOVL.U8 Q13,D18 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u…
223 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
284 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
298 …VMOVL.U8 Q13,D18 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u…
342 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
Dihevc_sao_edge_offset_class1_chroma.s147 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
161 …VMOVL.U8 Q13,D18 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u…
236 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
302 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
316 …VMOVL.U8 Q13,D18 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u…
373 VLD1.8 D18,[r10]! @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
Dihevc_sao_edge_offset_class3_chroma.s401 VTBL.8 D18,{D28},D18 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
410 VUZP.8 D18,D19 @I
411 VTBL.8 D22,{D6},D18 @I
537 VTBL.8 D18,{D20},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
548 VUZP.8 D18,D19 @III
551 VTBL.8 D22,{D6},D18 @III
635 VTBL.8 D18,{D28},D18 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
641 VUZP.8 D18,D19
643 VTBL.8 D22,{D6},D18
Dihevc_sao_edge_offset_class2_chroma.s368 …VMOV.16 D18[0],r5 @I pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd +…
410 VTBL.8 D18,{D30},D18 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
464 …VMOV.16 D18[0],r4 @III pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd…
546 VTBL.8 D18,{D20},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
555 VUZP.8 D18,D19 @III
556 VTBL.8 D22,{D6},D18 @III
602 …VMOV.16 D18[0],r5 @pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd + 1…
747 …VMOV.16 D18[0],r5 @pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd + 1…
891 …VMOV.16 D18[0],r5 @pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd + 1…
Dihevc_sao_band_offset_luma.s206 VSUB.I8 D18,D17,D31 @vsub_u8(au1_cur_row, band_pos)
208 …VTBX.8 D17,{D1-D4},D18 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
Dihevc_sao_edge_offset_class3.s314 VTBL.8 D18,{D6},D18 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
323 VTBL.8 D10,{D7},D18 @I offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
428 VTBL.8 D18,{D6},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
439 … VTBL.8 D10,{D7},D18 @III offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
Dihevc_sao_edge_offset_class0.s234 VMOVN.I16 D18,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
247 VST1.8 {D18,D19},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
Dihevc_sao_edge_offset_class0_chroma.s394 VMOVN.I16 D18,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
410 VST1.8 {D18},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
/external/icu/icu4c/source/allinone/
Dallinone.sln60 …1-00A0C91BC942}") = "letest", "..\test\letest\letest.vcxproj", "{67351485-4D18-4245-BE39-A7EF0675A…
298 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|Win32.ActiveCfg = Debug|Win32
299 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|Win32.Build.0 = Debug|Win32
300 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|x64.ActiveCfg = Debug|x64
301 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Debug|x64.Build.0 = Debug|x64
302 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|Win32.ActiveCfg = Release|Win32
303 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|Win32.Build.0 = Release|Win32
304 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|x64.ActiveCfg = Release|x64
305 {67351485-4D18-4245-BE39-A7EF0675ACD2}.Release|x64.Build.0 = Release|x64
/external/llvm/test/MC/MachO/
Dx86_64-symbols.s59 D18: label
Dx86_32-symbols.s59 D18: label
/external/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td150 def D18 : SparcReg< 5, "F36">;
175 def Q9 : Rq< 5, "F36", [D18, D19]>;
/external/valgrind/memcheck/
Dmc_machine.c892 if (o >= GOF(D18) && o+sz <= GOF(D18)+SZB(D18)) return GOF(D18); in get_otrack_shadow_offset_wrk()
919 if (o >= GOF(D18) && o+sz <= GOF(D18)+2*SZB(D18)) return GOF(D18); // Q9 in get_otrack_shadow_offset_wrk()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h129 case AArch64::D18: return AArch64::B18; in getBRegFromDReg()
169 case AArch64::B18: return AArch64::D18; in getDRegFromBReg()
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp122 case AArch64::D18: in isOdd()
DAArch64RegisterInfo.td334 def D18 : AArch64Reg<18, "d18", [S18], ["v18", ""]>, DwarfRegAlias<B18>;
369 def Q18 : AArch64Reg<18, "q18", [D18], ["v18", ""]>, DwarfRegAlias<B18>;
/external/libavc/encoder/arm/
Dime_distortion_metrics_a9q.s901 @;Q9 -> D18:D19
911 @;D18 : sad_right
932 @;D18 : sad_right
1193 @D18 Z4 Z1 Y4 Y1
/external/llvm/lib/Target/ARM/
DARMRegisterInfo.td121 def D18 : ARMFReg<18, "d18">, DwarfRegNum<[274]>;
149 def Q9 : ARMReg< 9, "q9", [D18, D19]>;
/external/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp88 SP::D2, SP::D18, SP::D3, SP::D19,
/external/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp116 Sparc::D16, Sparc::D17, Sparc::D18, Sparc::D19,
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp280 AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19,
/external/icu/icu4c/source/data/translit/
DLatin_ASCII.txt173 ᴘ → P ; # 1D18;LATIN LETTER SMALL CAPITAL P

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