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Searched refs:EXTRACT_SUBREG (Results 1 – 25 of 46) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsDerived.td20 (EXTRACT_SUBREG
22 (M2_dpmpyuu_s0 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1),
24 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
27 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)),
28 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_hireg))),
29 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_loreg)),
30 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_hireg))),
32 (EXTRACT_SUBREG
35 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)),
36 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
DHexagonSelectCCInfo.td104 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg),
105 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)),
107 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg),
108 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>;
116 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg),
117 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)),
120 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg),
121 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>;
DHexagonMachineScheduler.cpp53 case TargetOpcode::EXTRACT_SUBREG: in isResourceAvailable()
105 case TargetOpcode::EXTRACT_SUBREG: in reserveResources()
/external/llvm/lib/Target/X86/
DX86InstrCompiler.td256 def : Pat<(i8 0), (EXTRACT_SUBREG (MOV32r0), sub_8bit)>;
257 def : Pat<(i16 0), (EXTRACT_SUBREG (MOV32r0), sub_16bit)>;
1094 def : Pat<(i16 (anyext GR8 :$src)), (EXTRACT_SUBREG
1111 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
1117 N->getOpcode() != TargetOpcode::EXTRACT_SUBREG &&
1244 (EXTRACT_SUBREG GR64:$src, sub_32bit),
1252 (EXTRACT_SUBREG GR64:$src, sub_32bit),
1264 (MOVZX32rr16 (EXTRACT_SUBREG GR32:$src1, sub_16bit))>;
1267 (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src1,
1273 (EXTRACT_SUBREG (MOVZX32rr8 (EXTRACT_SUBREG
[all …]
DX86InstrAVX512.td536 (EXTRACT_SUBREG (From.VT VR512:$src), To.SubRegIdx))>;
541 (EXTRACT_SUBREG (AltFrom.VT VR512:$src), AltTo.SubRegIdx))>;
840 (VBROADCASTSSZr (EXTRACT_SUBREG (v16f32 VR512:$src), sub_xmm))>;
842 (VBROADCASTSDZr (EXTRACT_SUBREG (v8f64 VR512:$src), sub_xmm))>;
845 (VPBROADCASTDZrr (EXTRACT_SUBREG (v16i32 VR512:$src), sub_xmm))>;
847 (VPBROADCASTQZrr (EXTRACT_SUBREG (v8i64 VR512:$src), sub_xmm))>;
864 (EXTRACT_SUBREG
1202 (EXTRACT_SUBREG
1209 (EXTRACT_SUBREG
1696 (EXTRACT_SUBREG (KMOVBrk VK8:$src), sub_8bit)>;
[all …]
DX86InstrSSE.td343 (v4i32 (EXTRACT_SUBREG (v8i32 VR256:$src), sub_xmm))>;
345 (v4f32 (EXTRACT_SUBREG (v8f32 VR256:$src), sub_xmm))>;
348 (v2i64 (EXTRACT_SUBREG (v4i64 VR256:$src), sub_xmm))>;
350 (v2f64 (EXTRACT_SUBREG (v4f64 VR256:$src), sub_xmm))>;
353 (v8i16 (EXTRACT_SUBREG (v16i16 VR256:$src), sub_xmm))>;
355 (v16i8 (EXTRACT_SUBREG (v32i8 VR256:$src), sub_xmm))>;
673 (VMOVSSrr (EXTRACT_SUBREG (v8i32 VR256:$src1), sub_xmm),
674 (EXTRACT_SUBREG (v8i32 VR256:$src2), sub_xmm)),
678 (VMOVSSrr (EXTRACT_SUBREG (v8f32 VR256:$src1), sub_xmm),
679 (EXTRACT_SUBREG (v8f32 VR256:$src2), sub_xmm)),
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64InstrAtomics.td292 (STXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
294 (STXRH (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
296 (STXRW (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
308 (STXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
310 (STXRH (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
312 (STXRW (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
338 (STLXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
340 (STLXRH (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
342 (STLXRW (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
354 (STLXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
[all …]
DAArch64InstrInfo.td1862 (STRW (EXTRACT_SUBREG GPR64:$Rt, sub_32),
1867 (STRX (EXTRACT_SUBREG GPR64:$Rt, sub_32),
1924 (STRW (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx),
1929 (STRX (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx),
2033 (STRWui (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, uimm12s4:$offset)>;
2036 (STRHHui (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, uimm12s2:$offset)>;
2038 (STRBBui (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, uimm12s1:$offset)>;
2127 (STURWi (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, simm9:$offset)>;
2129 (STURHHi (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, simm9:$offset)>;
2131 (STURBBi (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, simm9:$offset)>;
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZPatterns.td16 (insn (EXTRACT_SUBREG GR64:$src, subreg_l32))>;
27 (insn cls:$src1, (EXTRACT_SUBREG GR64:$src2, subreg_l32))>;
36 (insn cls:$src1, (EXTRACT_SUBREG GR64:$src2, subreg_l32))>;
74 (insn (EXTRACT_SUBREG GR64:$R1, subreg_l32), mode:$XBD2)>;
89 (insn (EXTRACT_SUBREG GR64:$R1, subreg_l32), pcrel32:$XBD2)> {
106 (insn (EXTRACT_SUBREG GR64:$new, subreg_l32), mode:$addr,
111 (insninv (EXTRACT_SUBREG GR64:$new, subreg_l32), mode:$addr,
DSystemZInstrFP.td65 (CPSDRsd FP32:$src1, (EXTRACT_SUBREG FP128:$src2, subreg_h64))>;
74 (CPSDRdd FP64:$src1, (EXTRACT_SUBREG FP128:$src2, subreg_h64))>;
82 def : CopySign128<FP32, (CPSDRds (EXTRACT_SUBREG FP128:$src1, subreg_h64),
84 def : CopySign128<FP64, (CPSDRdd (EXTRACT_SUBREG FP128:$src1, subreg_h64),
86 def : CopySign128<FP128, (CPSDRdd (EXTRACT_SUBREG FP128:$src1, subreg_h64),
87 (EXTRACT_SUBREG FP128:$src2, subreg_h64))>;
144 (EXTRACT_SUBREG (LEXBR FP128:$src), subreg_hh32)>;
146 (EXTRACT_SUBREG (LDXBR FP128:$src), subreg_h64)>;
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td2861 (EXTRACT_SUBREG (rfrag8 $s1), sub_32)>;
2870 (EXTRACT_SUBREG (rfrag8 $s1), sub_32)>;
2959 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_lt)>;
2961 (EXTRACT_SUBREG (CMPWI $s1, imm:$imm), sub_lt)>;
2963 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_gt)>;
2965 (EXTRACT_SUBREG (CMPWI $s1, imm:$imm), sub_gt)>;
2967 (EXTRACT_SUBREG (CMPWI $s1, imm:$imm), sub_eq)>;
2969 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_eq)>;
2983 (EXTRACT_SUBREG (CMPLWI (XORIS $s1, (HI16 imm:$imm)),
2987 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_lt)>;
[all …]
DPPCInstrQPX.td843 (EXTRACT_SUBREG $S, sub_64)>;
845 (EXTRACT_SUBREG $S, sub_64)>;
848 (EXTRACT_SUBREG (QVESPLATI $S, 1), sub_64)>;
850 (EXTRACT_SUBREG (QVESPLATI $S, 2), sub_64)>;
852 (EXTRACT_SUBREG (QVESPLATI $S, 3), sub_64)>;
855 (EXTRACT_SUBREG (QVESPLATIs $S, 1), sub_64)>;
857 (EXTRACT_SUBREG (QVESPLATIs $S, 2), sub_64)>;
859 (EXTRACT_SUBREG (QVESPLATIs $S, 3), sub_64)>;
862 (EXTRACT_SUBREG (QVFPERM $S, $S,
867 (EXTRACT_SUBREG (QVFPERMs $S, $S,
DPPCInstrHTM.td98 (EXTRACT_SUBREG (
DPPCInstrVSX.td805 (f64 (EXTRACT_SUBREG $S, sub_64))>;
807 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
816 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
818 (f64 (EXTRACT_SUBREG $S, sub_64))>;
/external/llvm/include/llvm/Target/
DTargetOpcodes.h41 EXTRACT_SUBREG = 6, enumerator
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td4171 (v4i16 (EXTRACT_SUBREG QPR:$src2,
4177 (v2i32 (EXTRACT_SUBREG QPR:$src2,
4183 (v2f32 (EXTRACT_SUBREG QPR:$src2,
4209 (v4i16 (EXTRACT_SUBREG QPR:$src2,
4216 (v2i32 (EXTRACT_SUBREG QPR:$src2,
4231 (v4i16 (EXTRACT_SUBREG QPR:$src2,
4238 (v2i32 (EXTRACT_SUBREG QPR:$src2,
4288 (v4i16 (EXTRACT_SUBREG QPR:$src3,
4296 (v2i32 (EXTRACT_SUBREG QPR:$src3,
4305 (v2f32 (EXTRACT_SUBREG QPR:$src3,
[all …]
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td491 (EXTRACT_SUBREG GPR64:$src, sub_32)>;
493 (EXTRACT_SUBREG GPR64:$src, sub_32)>;
495 (SLL (EXTRACT_SUBREG GPR64:$src, sub_32), 0)>;
499 (EXTRACT_SUBREG (AND64 GPR64:$lhs, GPR64:$rhs), sub_32)>;
501 (EXTRACT_SUBREG (OR64 GPR64:$lhs, GPR64:$rhs), sub_32)>;
503 (EXTRACT_SUBREG (XOR64 GPR64:$lhs, GPR64:$rhs), sub_32)>;
/external/llvm/lib/Target/R600/
DSIInstructions.td2647 (i32 (EXTRACT_SUBREG f64:$src, sub0)),
2649 (V_OR_B32_e32 (EXTRACT_SUBREG f64:$src, sub1),
2667 (i32 (EXTRACT_SUBREG f64:$src, sub0)),
2669 (V_AND_B32_e32 (EXTRACT_SUBREG f64:$src, sub1),
2677 (i32 (EXTRACT_SUBREG f64:$src, sub0)),
2679 (V_XOR_B32_e32 (EXTRACT_SUBREG f64:$src, sub1),
2741 (V_INTERP_P2_F32 (V_INTERP_P1_F32 (EXTRACT_SUBREG v2i32:$ij, sub0),
2743 (EXTRACT_SUBREG $ij, sub1),
2762 (V_CUBETC_F32 0 /* src0_modifiers */, (EXTRACT_SUBREG $src, sub0),
2763 0 /* src1_modifiers */, (EXTRACT_SUBREG $src, sub1),
[all …]
DAMDGPUInstructions.td511 (EXTRACT_SUBREG $src, sub_reg)
564 (i32 (EXTRACT_SUBREG $src0, sub0)), sub0,
566 (i32 (EXTRACT_SUBREG $src0, sub1)),
567 (i32 (EXTRACT_SUBREG $src1, sub1))), sub1)
DAMDGPUISelDAGToDAG.cpp757 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
759 SDNode *Hi0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
762 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
764 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
1124 TargetOpcode::EXTRACT_SUBREG, in SelectAddrSpaceCast()
/external/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp220 case TargetOpcode::EXTRACT_SUBREG: in runOnMachineFunction()
/external/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp263 case TargetOpcode::EXTRACT_SUBREG: in isResourceAvailable()
303 case TargetOpcode::EXTRACT_SUBREG: in reserveResources()
DScheduleDAGRRList.cpp1898 if (Opc == TargetOpcode::EXTRACT_SUBREG || in getNodePriority()
2118 if (Opc == TargetOpcode::EXTRACT_SUBREG || in unscheduledNode()
2147 if (POpc == TargetOpcode::EXTRACT_SUBREG || in unscheduledNode()
2590 if (Opc == TargetOpcode::EXTRACT_SUBREG || in canEnableCoalescing()
2962 if (SuccOpc == TargetOpcode::EXTRACT_SUBREG || in AddPseudoTwoAddrDeps()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUInstructions.td136 (EXTRACT_SUBREG vec_class:$src, sub_reg)
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td294 // register. Truncate can be lowered to EXTRACT_SUBREG, and CopyFromReg may
299 N->getOpcode() != TargetOpcode::EXTRACT_SUBREG &&
1135 (EXTRACT_SUBREG GR16:$src, subreg_8bit)>;
1210 (BIT8rr (EXTRACT_SUBREG GR16:$src, subreg_8bit),
1211 (EXTRACT_SUBREG GR16:$src2, subreg_8bit))>;

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