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Searched refs:FPZero (Results 1 – 9 of 9) sorted by relevance

/external/vixl/src/vixl/a64/
Dsimulator-a64.cc2039 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2040 case FCVTZS_xs: set_xreg(dst, FPToInt64(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2041 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2042 case FCVTZS_xd: set_xreg(dst, FPToInt64(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2043 case FCVTZU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2044 case FCVTZU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2045 case FCVTZU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2046 case FCVTZU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2121 set_xreg(dst, FPToInt64(dreg(src) * std::pow(2.0, fbits), FPZero)); in VisitFPFixedPointConvert()
2124 set_wreg(dst, FPToInt32(dreg(src) * std::pow(2.0, fbits), FPZero)); in VisitFPFixedPointConvert()
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Dinstructions-a64.h148 FPZero = 0x3, enumerator
Dlogic-a64.cc3785 case FPZero: { in FPRoundInt()
4648 case FPZero: overflow_to_inf = false; break; in FPRecipEstimate()
/external/v8/src/arm64/
Dsimulator-arm64.cc2262 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2263 case FCVTZS_xs: set_xreg(dst, FPToInt64(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2264 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2265 case FCVTZS_xd: set_xreg(dst, FPToInt64(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2266 case FCVTZU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2267 case FCVTZU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPZero)); break; in VisitFPIntegerConvert()
2268 case FCVTZU_wd: set_wreg(dst, FPToUInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2269 case FCVTZU_xd: set_xreg(dst, FPToUInt64(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
2468 case FRINTZ_s: set_sreg(fd, FPRoundInt(sreg(fn), FPZero)); break; in VisitFPDataProcessing1Source()
2469 case FRINTZ_d: set_dreg(fd, FPRoundInt(dreg(fn), FPZero)); break; in VisitFPDataProcessing1Source()
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Dinstructions-arm64.h83 FPZero = 0x3, enumerator
/external/llvm/examples/Kaleidoscope/Orc/lazy_irgen/
Dtoy.cpp850 ConstantFP *FPZero = in IRGen() local
852 CondV = C.getBuilder().CreateFCmpONE(CondV, FPZero, "ifcond"); in IRGen()
/external/llvm/examples/Kaleidoscope/Orc/initial/
Dtoy.cpp850 ConstantFP *FPZero = in IRGen() local
852 CondV = C.getBuilder().CreateFCmpONE(CondV, FPZero, "ifcond"); in IRGen()
/external/llvm/examples/Kaleidoscope/Orc/lazy_codegen/
Dtoy.cpp850 ConstantFP *FPZero = in IRGen() local
852 CondV = C.getBuilder().CreateFCmpONE(CondV, FPZero, "ifcond"); in IRGen()
/external/llvm/examples/Kaleidoscope/Orc/fully_lazy/
Dtoy.cpp851 ConstantFP *FPZero = in IRGen() local
853 CondV = C.getBuilder().CreateFCmpONE(CondV, FPZero, "ifcond"); in IRGen()