| /external/llvm/lib/CodeGen/ |
| D | CriticalAntiDepBreaker.cpp | 333 unsigned NewReg) in isNewRegClobberedByRefs() argument
349 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs()
353 CheckOper.getReg() != NewReg) in isNewRegClobberedByRefs()
385 unsigned NewReg = Order[i]; in findSuitableFreeRegister() local
387 if (NewReg == AntiDepReg) continue; in findSuitableFreeRegister()
391 if (NewReg == LastNewReg) continue; in findSuitableFreeRegister()
395 if (isNewRegClobberedByRefs(RegRefBegin, RegRefEnd, NewReg)) continue; in findSuitableFreeRegister()
400 assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) in findSuitableFreeRegister()
402 if (KillIndices[NewReg] != ~0u || in findSuitableFreeRegister()
403 Classes[NewReg] == reinterpret_cast<TargetRegisterClass *>(-1) || in findSuitableFreeRegister()
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| D | MachineCSE.cpp | 541 unsigned NewReg = CSMI->getOperand(i).getReg(); in ProcessBlock() local
550 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlock()
553 if (OldReg == NewReg) { in ProcessBlock()
559 TargetRegisterInfo::isVirtualRegister(NewReg) && in ProcessBlock()
562 if (!isProfitableToCSE(NewReg, OldReg, CSMI, MI)) { in ProcessBlock()
571 if (!MRI->constrainRegClass(NewReg, OldRC)) { in ProcessBlock()
577 CSEPairs.push_back(std::make_pair(OldReg, NewReg)); in ProcessBlock()
585 unsigned NewReg = CSEPairs[i].second; in ProcessBlock() local
587 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlock()
589 Def->clearRegisterDeads(NewReg); in ProcessBlock()
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| D | AggressiveAntiDepBreaker.cpp | 646 unsigned NewReg = 0; in FindSuitableFreeRegisters() local
648 NewReg = NewSuperReg; in FindSuitableFreeRegisters()
652 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters()
655 DEBUG(dbgs() << " " << TRI->getName(NewReg)); in FindSuitableFreeRegisters()
659 if (!BV.test(NewReg)) { in FindSuitableFreeRegisters()
668 if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) { in FindSuitableFreeRegisters()
673 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters()
691 int Idx = UseMI->findRegisterDefOperandIdx(NewReg, false, true, TRI); in FindSuitableFreeRegisters()
702 RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg)); in FindSuitableFreeRegisters()
915 unsigned NewReg = S->second; in BreakAntiDependencies() local
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| D | AntiDepBreaker.h | 58 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) { in UpdateDbgValue() argument
61 MI->getOperand(0).setReg(NewReg); in UpdateDbgValue()
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| D | TailDuplication.cpp | 89 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
380 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg, in AddSSAUpdateEntry() argument
384 LI->second.push_back(std::make_pair(BB, NewReg)); in AddSSAUpdateEntry()
387 Vals.push_back(std::make_pair(BB, NewReg)); in AddSSAUpdateEntry()
443 unsigned NewReg = MRI->createVirtualRegister(RC); in DuplicateInstruction() local
444 MO.setReg(NewReg); in DuplicateInstruction()
445 LocalVRMap.insert(std::make_pair(Reg, NewReg)); in DuplicateInstruction()
447 AddSSAUpdateEntry(Reg, NewReg, PredBB); in DuplicateInstruction()
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| D | PeepholeOptimizer.cpp | 657 virtual bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) { in RewriteCurrentSource() argument
661 MOSrc.setReg(NewReg); in RewriteCurrentSource()
707 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
712 MO.setReg(NewReg); in RewriteCurrentSource()
756 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
761 CopyLike.getOperand(CurrentSrcIdx).setReg(NewReg); in RewriteCurrentSource()
835 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument
842 MO.setReg(NewReg); in RewriteCurrentSource()
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| D | LiveDebugVariables.h | 48 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
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| D | CriticalAntiDepBreaker.h | 98 unsigned NewReg);
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| D | TwoAddressInstructionPass.cpp | 740 unsigned NewReg = 0; in scanUses() local
743 NewReg, IsDstPhys)) { in scanUses()
753 VirtRegPairs.push_back(NewReg); in scanUses()
756 bool isNew = SrcRegMap.insert(std::make_pair(NewReg, Reg)).second; in scanUses()
758 assert(SrcRegMap[NewReg] == Reg && "Can't map to two src registers!"); in scanUses()
759 VirtRegPairs.push_back(NewReg); in scanUses()
760 Reg = NewReg; in scanUses()
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| D | RegisterCoalescer.cpp | 667 unsigned NewReg = NewDstMO.getReg(); in removeCopyByCommutingDef() local
668 if (NewReg != IntB.reg || !IntB.Query(AValNo->def).isKill()) in removeCopyByCommutingDef()
731 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
741 if (TargetRegisterInfo::isPhysicalRegister(NewReg)) in removeCopyByCommutingDef()
742 UseMO.substPhysReg(NewReg, *TRI); in removeCopyByCommutingDef()
744 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64DeadRegisterDefinitionsPass.cpp | 98 unsigned NewReg; in processMachineBasicBlock() local
104 NewReg = AArch64::WZR; in processMachineBasicBlock()
107 NewReg = AArch64::XZR; in processMachineBasicBlock()
111 MO.setReg(NewReg); in processMachineBasicBlock()
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| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 658 unsigned NewReg = optimizeSDPattern(MI); in runOnInstruction() local
660 if (NewReg != 0) { in runOnInstruction()
669 MRI->constrainRegClass(NewReg, MRI->getRegClass((*I)->getReg())); in runOnInstruction()
673 << PrintReg(NewReg) << "\n"); in runOnInstruction()
674 (*I)->substVirtReg(NewReg, 0, *TRI); in runOnInstruction()
677 Replacements[MI] = NewReg; in runOnInstruction()
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| D | ARMBaseRegisterInfo.cpp | 278 ARMBaseRegisterInfo::updateRegAllocHint(unsigned Reg, unsigned NewReg, in updateRegAllocHint() argument
293 MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg); in updateRegAllocHint()
294 if (TargetRegisterInfo::isVirtualRegister(NewReg)) in updateRegAllocHint()
295 MRI->setRegAllocationHint(NewReg, in updateRegAllocHint()
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| D | ARMBaseRegisterInfo.h | 131 void updateRegAllocHint(unsigned Reg, unsigned NewReg,
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| D | ARMBaseInstrInfo.cpp | 2708 unsigned NewReg = MRI->createVirtualRegister(MRI->getRegClass(Reg)); in FoldImmediate() local
2711 get(NewUseOpc), NewReg) in FoldImmediate()
2715 UseMI->getOperand(1).setReg(NewReg); in FoldImmediate()
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DbgValueHistoryCalculator.cpp | 217 if (unsigned NewReg = isDescribedByReg(MI)) in calculateDbgValueHistory() local
218 addRegDescribedVar(RegVars, NewReg, Var); in calculateDbgValueHistory()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 586 Record *NewReg = new Record(Name, Def->getLoc(), Def->getRecords()); in expand() local
587 Elts.insert(NewReg); in expand()
593 NewReg->addSuperClass(Supers[i], Ranges[i]); in expand()
600 if (NewReg->getValue(RV.getNameInit())) in expand()
624 NewReg->addValue(*Def->getValue(Field)); in expand()
633 NewReg->addValue(*DefRV); in expand()
638 NewReg->addValue(RV); in expand()
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| /external/clang/lib/StaticAnalyzer/Core/ |
| D | ExprEngineCXX.cpp | 435 const MemRegion *NewReg = symVal.castAs<loc::MemRegionVal>().getRegion(); in VisitCXXNewExpr() local
438 getStoreManager().GetElementZeroRegion(NewReg, ObjTy); in VisitCXXNewExpr()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 458 unsigned NewReg = MRI->createVirtualRegister(RC); in ConstrainForSubReg() local
459 BuildMI(*MBB, InsertPos, DL, TII->get(TargetOpcode::COPY), NewReg) in ConstrainForSubReg()
461 return NewReg; in ConstrainForSubReg()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 703 virtual void updateRegAllocHint(unsigned Reg, unsigned NewReg, in updateRegAllocHint() argument
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| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1614 unsigned NewReg = ScratchFPReg; in handleSpecialFP() local
1615 duplicateToTop(FirstFPRegOp, NewReg, MI); in handleSpecialFP()
1616 FirstFPRegOp = NewReg; in handleSpecialFP()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 282 MCOperand NewReg; in printInst() local
287 NewReg = MCOperand::CreateReg(MRI.getMatchingSuperReg( in printInst()
289 NewMI.addOperand(NewReg); in printInst()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 674 unsigned NewReg = RegInfo.createVirtualRegister(TRC); in createVR() local
675 return NewReg; in createVR()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 5896 unsigned NewReg = MRI->getMatchingSuperReg(Reg1, ARM::gsub_0, in ParseInstruction() local
5899 ARMOperand::CreateReg(NewReg, Op1.getStartLoc(), Op2.getEndLoc()); in ParseInstruction()
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