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Searched refs:PostInc (Results 1 – 9 of 9) sorted by relevance

/external/clang/test/SemaCXX/
Doverloaded-operator.cpp110 struct PostInc { struct
111 PostInc operator++(int);
112 PostInc& operator++();
120 void incdec_test(PostInc pi, PostDec pd) { in incdec_test()
121 const PostInc& pi1 = pi++; in incdec_test()
123 PostInc &pi2 = ++pi; in incdec_test()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonBaseInfo.h70 PostInc = 6 // Post increment addressing mode enumerator
/external/clang/include/clang/AST/
DStmtVisitor.h153 UNARYOP_FALLBACK(PostInc) UNARYOP_FALLBACK(PostDec)
DDataRecursiveASTVisitor.h42 OPERATOR(PostInc) OPERATOR(PostDec) OPERATOR(PreInc) OPERATOR(PreDec) \
DRecursiveASTVisitor.h42 OPERATOR(PostInc) OPERATOR(PostDec) OPERATOR(PreInc) OPERATOR(PreDec) \
/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormats.td49 def PostInc : AddrModeType<6>; // Post increment addressing mode
DHexagonInstrInfo.cpp1576 return (getAddrMode(MI) == HexagonII::PostInc); in isPostIncrement()
DHexagonInstrInfo.td1814 let hasSideEffects = 0, addrMode = PostInc in
1848 let isPredicated = 1, hasSideEffects = 0, addrMode = PostInc in
1941 let hasSideEffects = 0, addrMode = PostInc in
1976 let hasSideEffects = 0, addrMode = PostInc in
3288 let isPredicable = 1, hasSideEffects = 0, addrMode = PostInc in
3323 let isPredicated = 1, hasSideEffects = 0, addrMode = PostInc in
DHexagonInstrInfoV4.td1354 let hasSideEffects = 0, addrMode = PostInc in
1383 let isPredicable = 1, hasSideEffects = 0, addrMode = PostInc, isNVStore = 1,
1416 let isPredicated = 1, hasSideEffects = 0, addrMode = PostInc, isNVStore = 1,