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Searched refs:SSE3 (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dhaddsub.ll1 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,-avx | FileCheck %s -check-prefix=SSE3
4 ; SSE3-LABEL: haddpd1:
5 ; SSE3-NOT: vhaddpd
6 ; SSE3: haddpd
16 ; SSE3-LABEL: haddpd2:
17 ; SSE3-NOT: vhaddpd
18 ; SSE3: haddpd
28 ; SSE3-LABEL: haddpd3:
29 ; SSE3-NOT: vhaddpd
30 ; SSE3: haddpd
[all …]
Dvector-shuffle-128-v4.ll2 … -mcpu=x86-64 -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
253 ; SSE3-LABEL: shuffle_v4f32_0022:
254 ; SSE3: # BB#0:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
256 ; SSE3-NEXT: retq
281 ; SSE3-LABEL: shuffle_v4f32_1133:
282 ; SSE3: # BB#0:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
284 ; SSE3-NEXT: retq
311 ; SSE3-LABEL: shuffle_v4i32_0124:
[all …]
Dvector-shuffle-128-v2.ll2 … -mcpu=x86-64 -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
106 ; SSE3-LABEL: shuffle_v2f64_00:
107 ; SSE3: # BB#0:
108 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
109 ; SSE3-NEXT: retq
161 ; SSE3-LABEL: shuffle_v2f64_22:
162 ; SSE3: # BB#0:
163 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
164 ; SSE3-NEXT: retq
218 ; SSE3-LABEL: shuffle_v2f64_03:
[all …]
Dhaddsub-2.ll1 …UN: llc < %s -march=x86-64 -mattr=+sse2,+sse3 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE3
124 ; SSE3-NOT: phaddd
151 ; SSE3-NOT: phaddd
178 ; SSE3-NOT: phsubd
205 ; SSE3-NOT: phsubd
296 ; SSE3: haddpd
297 ; SSE3-NEXT: haddpd
327 ; SSE3: hsubpd
328 ; SSE3-NEXT: hsubpd
374 ; SSE3-NOT: phaddd
[all …]
Dsplat-for-size.ll7 …s no AVX broadcast from double to 128-bit vector because movddup has been around since SSE3 (grrr).
Dsse3.ll1 ; These are tests for SSE3 codegen.
/external/llvm/test/Analysis/CostModel/X86/
Darith.ll2 …st-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=SSE3
51 ; SSE3: sse3mull
53 ; SSE3: cost of 6 {{.*}} mul
56 ; SSE3: avx2mull
Dreduction.ll2 …eduxcost=true -analyze -mcpu=corei7 -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=SSE3
104 ; SSE3: cost of 2 {{.*}} extractelement
118 ; SSE3: cost of 4 {{.*}} extractelement
158 ; SSE3: cost of 2 {{.*}} extractelement
172 ; SSE3: cost of 3 {{.*}} extractelement
201 ; SSE3: cost of 4 {{.*}} extractelement
229 ; SSE3: cost of 2 {{.*}} extractelement
245 ; SSE3: cost of 4 {{.*}} extractelement
291 ; SSE3: cost of 2 {{.*}} extractelement
307 ; SSE3: cost of 3 {{.*}} extractelement
[all …]
/external/llvm/lib/Target/X86/
DX86Subtarget.h50 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
330 bool hasSSE3() const { return X86SSELevel >= SSE3; } in hasSSE3()
DX86.td51 def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3",
52 "Enable SSE3 instructions",
DX86InstrFormats.td593 // SSE3 Instruction Templates:
595 // S3I - SSE3 instructions with PD prefixes.
596 // S3SI - SSE3 instructions with XS prefix.
597 // S3DI - SSE3 instructions with XD prefix.
/external/eigen/Eigen/
DCore185 return "SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2";
187 return "SSE, SSE2, SSE3, SSSE3, SSE4.1";
189 return "SSE, SSE2, SSE3, SSSE3";
191 return "SSE, SSE2, SSE3";
/external/eigen/test/eigen2/
Dtestsuite.cmake184 elseif(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE3)
191 …GEN_EXPLICIT_VECTORIZATION (${EIGEN_EXPLICIT_VECTORIZATION}), must be: novec, SSE2, SSE3, Altivec")
/external/valgrind/docs/internals/
D3_2_BUGSTATUS.txt6 sse3fix = fixed by the SSE3 commits
194 6655/6657 SSE3 feature tests for regtests
424 SSE3 commits: vx1635,1636, v5997
434 sse3fix vx1646 Vfd 106852 x86->IR: fisttp (SSE3)
441 sse3fix vx1646 Vfd 129358 x86->IR: fisttpl (SSE3)
D3_0_BUGSTATUS.txt124 113403 Partial SSE3 support on x86
/external/eigen/test/
Dtestsuite.cmake210 elseif(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE3)
223 …GEN_EXPLICIT_VECTORIZATION (${EIGEN_EXPLICIT_VECTORIZATION}), must be: novec, SSE2, SSE3, Altivec")
/external/eigen/cmake/
DEigenTesting.cmake231 message(STATUS "SSE3: ON")
233 message(STATUS "SSE3: Using architecture defaults")
405 set(${VAR} SSE3)
/external/libvpx/libvpx/test/
Dsad_test.cc622 INSTANTIATE_TEST_CASE_P(SSE3, SADx4Test, ::testing::Values(
635 INSTANTIATE_TEST_CASE_P(SSE3, SADTest, ::testing::Values(
/external/eigen/
DCMakeLists.txt175 option(EIGEN_TEST_SSE3 "Enable/Disable SSE3 in tests/examples" OFF)
178 message(STATUS "Enabling SSE3 in tests/examples")
/external/v8/src/
Dglobals.h614 SSE3, enumerator
/external/clang/lib/Basic/
DTargets.cpp1929 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
2584 case SSE3: in setSSELevel()
2603 case SSE3: in setSSELevel()
2662 setSSELevel(Features, SSE3, true); in setXOPLevel()
2691 setSSELevel(Features, SSE3, Enabled); in setFeatureEnabledImpl()
2871 .Case("sse3", SSE3) in handleTargetFeatures()
3195 case SSE3: in getTargetDefines()
3215 case SSE3: in getTargetDefines()
3280 .Case("sse3", SSELevel >= SSE3) in hasFeature()
/external/v8/src/ia32/
Dassembler-ia32.cc62 if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3; in ProbeImpl()
1625 DCHECK(IsEnabled(SSE3)); in fisttp_s()
1633 DCHECK(IsEnabled(SSE3)); in fisttp_d()
/external/v8/src/x87/
Dassembler-x87.cc1572 DCHECK(IsEnabled(SSE3)); in fisttp_s()
1580 DCHECK(IsEnabled(SSE3)); in fisttp_d()
/external/v8/src/x64/
Dassembler-x64.cc28 if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3; in ProbeImpl()
1956 DCHECK(IsEnabled(SSE3)); in fisttp_s()
1965 DCHECK(IsEnabled(SSE3)); in fisttp_d()
/external/clang/docs/
DCrossCompilation.rst113 * ``-fpu=<fpu-name>``, like SSE3, NEON, controlling the FP unit available

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