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Searched refs:SrcReg1 (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp836 unsigned SrcReg1 = getRegForValue(SrcValue1); in PPCEmitCmp() local
837 if (SrcReg1 == 0) in PPCEmitCmp()
849 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
851 SrcReg1 = ExtReg; in PPCEmitCmp()
863 .addReg(SrcReg1).addReg(SrcReg2); in PPCEmitCmp()
866 .addReg(SrcReg1).addImm(Imm); in PPCEmitCmp()
1169 unsigned SrcReg1 = getRegForValue(I->getOperand(0)); in SelectBinaryIntOp() local
1170 if (SrcReg1 == 0) return false; in SelectBinaryIntOp()
1183 MRI.setRegClass(SrcReg1, &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1187 MRI.setRegClass(SrcReg1, &PPC::G8RC_and_G8RC_NOX0RegClass); in SelectBinaryIntOp()
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/external/llvm/lib/Target/ARM/
DARMFastISel.cpp1438 unsigned SrcReg1 = getRegForValue(Src1Value); in ARMEmitCmp() local
1439 if (SrcReg1 == 0) return false; in ARMEmitCmp()
1449 SrcReg1 = ARMEmitIntExt(SrcVT, SrcReg1, MVT::i32, isZExt); in ARMEmitCmp()
1450 if (SrcReg1 == 0) return false; in ARMEmitCmp()
1458 SrcReg1 = constrainOperandRegClass(II, SrcReg1, 0); in ARMEmitCmp()
1462 .addReg(SrcReg1).addReg(SrcReg2)); in ARMEmitCmp()
1466 .addReg(SrcReg1); in ARMEmitCmp()
1774 unsigned SrcReg1 = getRegForValue(I->getOperand(0)); in SelectBinaryIntOp() local
1775 if (SrcReg1 == 0) return false; in SelectBinaryIntOp()
1783 SrcReg1 = constrainOperandRegClass(TII.get(Opc), SrcReg1, 1); in SelectBinaryIntOp()
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/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp2601 unsigned SrcReg1 = MUL->getOperand(2).getReg(); in genMadd() local
2610 if (TargetRegisterInfo::isVirtualRegister(SrcReg1)) in genMadd()
2611 MRI.constrainRegClass(SrcReg1, RC); in genMadd()
2618 .addReg(SrcReg1, getKillRegState(Src1IsKill)) in genMadd()
2651 unsigned SrcReg1 = MUL->getOperand(2).getReg(); in genMaddR() local
2658 if (TargetRegisterInfo::isVirtualRegister(SrcReg1)) in genMaddR()
2659 MRI.constrainRegClass(SrcReg1, RC); in genMaddR()
2666 .addReg(SrcReg1, getKillRegState(Src1IsKill)) in genMaddR()
/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_program_alu.c63 struct rc_src_register SrcReg0, struct rc_src_register SrcReg1) in emit2() argument
74 fpi->U.I.SrcReg[1] = SrcReg1; in emit2()
82 struct rc_src_register SrcReg0, struct rc_src_register SrcReg1, in emit3() argument
94 fpi->U.I.SrcReg[1] = SrcReg1; in emit3()