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Searched refs:VirtRegMap (Results 1 – 25 of 28) sorted by relevance

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/external/llvm/lib/CodeGen/
DVirtRegMap.cpp52 char VirtRegMap::ID = 0;
54 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
56 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
70 void VirtRegMap::grow() { in grow()
77 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
84 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { in hasPreferredPhys()
93 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { in hasKnownPreference()
102 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
110 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
120 void VirtRegMap::print(raw_ostream &OS, const Module*) const { in print()
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DRegAllocBase.h47 class VirtRegMap; variable
63 VirtRegMap *VRM;
74 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
DSplitKit.h36 class VirtRegMap; variable
45 const VirtRegMap &VRM;
120 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
214 VirtRegMap &VRM;
353 SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
DSpiller.h18 class VirtRegMap; variable
38 VirtRegMap &vrm);
DLiveDebugVariables.h32 class VirtRegMap; variable
59 void emitDebugValues(VirtRegMap *VRM);
DAllocationOrder.h26 class VirtRegMap; variable
39 const VirtRegMap &VRM,
DRegAllocPBQP.cpp129 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
133 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
140 VirtRegMap &VRM,
146 VirtRegMap &VRM) const;
517 au.addRequired<VirtRegMap>(); in getAnalysisUsage()
518 au.addPreserved<VirtRegMap>(); in getAnalysisUsage()
553 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, in initializeGraph()
630 VirtRegMap &VRM, Spiller &VRegSpiller) { in spillVReg()
656 VirtRegMap &VRM, in mapPBQPToRegAlloc()
695 VirtRegMap &VRM) const { in finalizeAlloc()
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DLiveRegMatrix.cpp36 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
46 AU.addRequiredTransitive<VirtRegMap>(); in getAnalysisUsage()
54 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
DRegAllocBasic.cpp151 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
152 AU.addPreserved<VirtRegMap>(); in getAnalysisUsage()
275 RegAllocBase::init(getAnalysis<VirtRegMap>(), in runOnMachineFunction()
DLiveDebugVariables.cpp266 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
269 void emitDebugValues(VirtRegMap *VRM,
354 void emitDebugValues(VirtRegMap *VRM);
925 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) { in rewriteLocations()
941 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) { in rewriteLocations()
998 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, in emitDebugValues()
1031 void LDVImpl::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
1044 void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
DAllocationOrder.cpp31 const VirtRegMap &VRM, in AllocationOrder()
DRegAllocBase.cpp57 void RegAllocBase::init(VirtRegMap &vrm, in init()
DCMakeLists.txt118 VirtRegMap.cpp
DAndroid.mk120 VirtRegMap.cpp \
DInlineSpiller.cpp65 VirtRegMap &VRM;
141 InlineSpiller(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm) in InlineSpiller()
193 VirtRegMap &vrm) { in createInlineSpiller()
1326 if (StackSlot == VirtRegMap::NO_STACK_SLOT) { in spillAll()
DTargetRegisterInfo.cpp269 const VirtRegMap *VRM) const { in getRegAllocationHints()
DRegAllocGreedy.cpp462 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
463 AU.addPreserved<VirtRegMap>(); in getAnalysisUsage()
2538 RegAllocBase::init(getAnalysis<VirtRegMap>(), in runOnMachineFunction()
DSplitKit.cpp43 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis, in SplitAnalysis()
318 SplitEditor::SplitEditor(SplitAnalysis &sa, LiveIntervals &lis, VirtRegMap &vrm, in SplitEditor()
/external/llvm/include/llvm/CodeGen/
DVirtRegMap.h32 class VirtRegMap : public MachineFunctionPass {
66 VirtRegMap(const VirtRegMap&) = delete;
67 void operator=(const VirtRegMap&) = delete;
71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), in VirtRegMap() function
184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
DLiveRangeEdit.h35 class VirtRegMap; variable
65 VirtRegMap *VRM;
116 MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
DLiveRegMatrix.h37 class VirtRegMap; variable
43 VirtRegMap *VRM;
DLiveIntervalAnalysis.h50 class VirtRegMap; variable
287 void addKillFlags(const VirtRegMap*);
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h33 class VirtRegMap; variable
695 const VirtRegMap *VRM = nullptr) const;
/external/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h129 const VirtRegMap *VRM) const override;
DARMBaseRegisterInfo.cpp228 const VirtRegMap *VRM) const { in getRegAllocationHints()

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