Searched refs:ZeroReg (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 83 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
91 Opc = Mips::ADDu, ZeroReg = Mips::ZERO; in copyPhysReg()
144 Opc = Mips::DADDu, ZeroReg = Mips::ZERO_64; in copyPhysReg()
175 if (ZeroReg) in copyPhysReg()
176 MIB.addReg(ZeroReg); in copyPhysReg()
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| D | MipsSEISelDAGToDAG.cpp | 88 unsigned DstReg = 0, ZeroReg = 0; in replaceUsesWithZeroReg() local
95 ZeroReg = Mips::ZERO; in replaceUsesWithZeroReg()
100 ZeroReg = Mips::ZERO_64; in replaceUsesWithZeroReg()
118 MO.setReg(ZeroReg); in replaceUsesWithZeroReg()
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| D | MipsAsmPrinter.cpp | 123 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; in emitPseudoIndirectBranch() local
124 TmpInst0.addOperand(MCOperand::CreateReg(ZeroReg)); in emitPseudoIndirectBranch()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2440 unsigned MulOpc, unsigned ZeroReg) { in canCombineWithMUL() argument
2455 if (MI->getOperand(3).getReg() != ZeroReg) in canCombineWithMUL()
2731 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
2736 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
2743 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
2759 .addReg(ZeroReg) in genAlternativeCodeSequence()
2775 unsigned SubOpc, ZeroReg; in genAlternativeCodeSequence() local
2779 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
2785 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
2793 .addReg(ZeroReg) in genAlternativeCodeSequence()
[all …]
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| D | AArch64FastISel.cpp | 345 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; in materializeInt() local
348 ResultReg).addReg(ZeroReg, getKillRegState(true)); in materializeInt()
4780 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; in selectSDiv() local
4783 ResultReg = emitAddSub_rs(/*UseAdd=*/false, VT, ZeroReg, /*IsKill=*/true, in selectSDiv()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 1141 unsigned ZeroReg; in FoldImmediate() local
1144 ZeroReg = isPPC64 ? PPC::ZERO8 : PPC::ZERO; in FoldImmediate()
1146 ZeroReg = UseInfo->RegClass == PPC::G8RC_NOX0RegClassID ? in FoldImmediate()
1151 UseMI->getOperand(UseIdx).setReg(ZeroReg); in FoldImmediate()
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| D | PPCISelLowering.cpp | 7930 unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitPartwordAtomicBinary() local
7992 if (ptrA != ZeroReg) { in EmitPartwordAtomicBinary()
8022 .addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
8033 .addReg(Tmp4Reg).addReg(ZeroReg).addReg(PtrReg); in EmitPartwordAtomicBinary()
8685 unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitInstrWithCustomInserter() local
8718 if (ptrA != ZeroReg) { in EmitInstrWithCustomInserter()
8755 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
8771 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
8780 .addReg(ZeroReg).addReg(PtrReg); in EmitInstrWithCustomInserter()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1502 unsigned ZeroReg = fastMaterializeConstant(Zero); in SelectCmp() local
1505 .addReg(ZeroReg).addImm(1) in SelectCmp()
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