/external/valgrind/none/tests/ppc64/ |
D | test_dfp4.c | 85 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 98 _Decimal64 f14 = val1->dec_val; in _test_dtstdc() local 106 __asm__ __volatile__ ("dtstdc 5, %0, 1" : : "f" (f14)); in _test_dtstdc() 108 __asm__ __volatile__ ("dtstdc 0, %0, 1" : : "f" (f14)); in _test_dtstdc() 112 __asm__ __volatile__ ("dtstdc 5, %0, 2" : : "f" (f14)); in _test_dtstdc() 114 __asm__ __volatile__ ("dtstdc 0, %0, 2" : : "f" (f14)); in _test_dtstdc() 118 __asm__ __volatile__ ("dtstdc 5, %0, 4" : : "f" (f14)); in _test_dtstdc() 120 __asm__ __volatile__ ("dtstdc 0, %0, 4" : : "f" (f14)); in _test_dtstdc() 124 __asm__ __volatile__ ("dtstdc 5, %0, 8" : : "f" (f14)); in _test_dtstdc() 126 __asm__ __volatile__ ("dtstdc 0, %0, 8" : : "f" (f14)); in _test_dtstdc() [all …]
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D | test_dfp1.c | 29 register double f14 __asm__ ("fr14"); 77 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 85 __asm__ __volatile__ ("dadd. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dadd() 87 __asm__ __volatile__ ("dadd %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dadd() 93 __asm__ __volatile__ ("dsub. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dsub() 95 __asm__ __volatile__ ("dsub %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dsub() 101 __asm__ __volatile__ ("dmul. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dmul() 103 __asm__ __volatile__ ("dmul %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dmul() 109 __asm__ __volatile__ ("ddiv. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_ddiv() 111 __asm__ __volatile__ ("ddiv %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_ddiv() [all …]
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D | test_dfp2.c | 35 register double f14 __asm__ ("fr14"); 55 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 116 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_0)); in _test_dscri() 120 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_1)); in _test_dscri() 124 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_2)); in _test_dscri() 128 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_3)); in _test_dscri() 139 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_0)); in _test_dscli() 143 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_1)); in _test_dscli() 147 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_2)); in _test_dscli() 151 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_3)); in _test_dscli() [all …]
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D | test_dfp3.c | 30 register double f14 __asm__ ("fr14"); 78 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 157 __asm__ __volatile__ ("diex %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_diex() 173 __asm__ __volatile__ ("dcmpo 0, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 176 __asm__ __volatile__ ("dcmpo 1, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 179 __asm__ __volatile__ ("dcmpo 2, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 182 __asm__ __volatile__ ("dcmpo 3, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 185 __asm__ __volatile__ ("dcmpo 4, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 188 __asm__ __volatile__ ("dcmpo 5, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 191 __asm__ __volatile__ ("dcmpo 6, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() [all …]
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/external/valgrind/none/tests/ppc32/ |
D | test_dfp4.c | 85 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 98 _Decimal64 f14 = val1->dec_val; in _test_dtstdc() local 106 __asm__ __volatile__ ("dtstdc 5, %0, 1" : : "f" (f14)); in _test_dtstdc() 108 __asm__ __volatile__ ("dtstdc 0, %0, 1" : : "f" (f14)); in _test_dtstdc() 112 __asm__ __volatile__ ("dtstdc 5, %0, 2" : : "f" (f14)); in _test_dtstdc() 114 __asm__ __volatile__ ("dtstdc 0, %0, 2" : : "f" (f14)); in _test_dtstdc() 118 __asm__ __volatile__ ("dtstdc 5, %0, 4" : : "f" (f14)); in _test_dtstdc() 120 __asm__ __volatile__ ("dtstdc 0, %0, 4" : : "f" (f14)); in _test_dtstdc() 124 __asm__ __volatile__ ("dtstdc 5, %0, 8" : : "f" (f14)); in _test_dtstdc() 126 __asm__ __volatile__ ("dtstdc 0, %0, 8" : : "f" (f14)); in _test_dtstdc() [all …]
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D | test_dfp1.c | 29 register double f14 __asm__ ("fr14"); 77 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 85 __asm__ __volatile__ ("dadd. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dadd() 87 __asm__ __volatile__ ("dadd %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dadd() 93 __asm__ __volatile__ ("dsub. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dsub() 95 __asm__ __volatile__ ("dsub %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dsub() 101 __asm__ __volatile__ ("dmul. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dmul() 103 __asm__ __volatile__ ("dmul %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_dmul() 109 __asm__ __volatile__ ("ddiv. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_ddiv() 111 __asm__ __volatile__ ("ddiv %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_ddiv() [all …]
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D | test_dfp2.c | 35 register double f14 __asm__ ("fr14"); 55 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 116 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_0)); in _test_dscri() 120 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_1)); in _test_dscri() 124 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_2)); in _test_dscri() 128 __asm__ __volatile__ ("dscri %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_3)); in _test_dscri() 139 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_0)); in _test_dscli() 143 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_1)); in _test_dscli() 147 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_2)); in _test_dscli() 151 __asm__ __volatile__ ("dscli %0, %1, %2" : "=f" (f18) : "f" (f14), "i" (SH_3)); in _test_dscli() [all …]
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D | test_dfp3.c | 30 register double f14 __asm__ ("fr14"); 78 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 157 __asm__ __volatile__ ("diex %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); in _test_diex() 173 __asm__ __volatile__ ("dcmpo 0, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 176 __asm__ __volatile__ ("dcmpo 1, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 179 __asm__ __volatile__ ("dcmpo 2, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 182 __asm__ __volatile__ ("dcmpo 3, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 185 __asm__ __volatile__ ("dcmpo 4, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 188 __asm__ __volatile__ ("dcmpo 5, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() 191 __asm__ __volatile__ ("dcmpo 6, %0, %1" : : "f" (f14),"f" (f16)); in _test_dcmpo() [all …]
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/external/llvm/test/MC/Mips/ |
D | mips-fpu-instructions.s | 9 # CHECK: abs.d $f12, $f14 # encoding: [0x05,0x73,0x20,0x46] 11 # CHECK: add.d $f8, $f12, $f14 # encoding: [0x00,0x62,0x2e,0x46] 13 # CHECK: floor.w.d $f12, $f14 # encoding: [0x0f,0x73,0x20,0x46] 15 # CHECK: ceil.w.d $f12, $f14 # encoding: [0x0e,0x73,0x20,0x46] 17 # CHECK: mul.d $f8, $f12, $f14 # encoding: [0x02,0x62,0x2e,0x46] 19 # CHECK: neg.d $f12, $f14 # encoding: [0x07,0x73,0x20,0x46] 21 # CHECK: round.w.d $f12, $f14 # encoding: [0x0c,0x73,0x20,0x46] 23 # CHECK: sqrt.d $f12, $f14 # encoding: [0x04,0x73,0x20,0x46] 25 # CHECK: sub.d $f8, $f12, $f14 # encoding: [0x01,0x62,0x2e,0x46] 27 # CHECK: trunc.w.d $f12, $f14 # encoding: [0x0d,0x73,0x20,0x46] [all …]
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | select.ll | 173 ; M3: mov.s $f13, $f14 190 ; CMOV-64: movn.s $f14, $f13, $[[T0]] 191 ; CMOV-64: mov.s $f0, $f14 194 ; SEL-64: sel.s $f0, $f14, $f13 207 ; M2: mov.s $f12, $f14 214 ; CMOV-32: movn.s $f14, $f12, $[[T0]] 215 ; CMOV-32: mov.s $f0, $f14 218 ; SEL-32: sel.s $f0, $f14, $f12 261 ; M3: mov.d $f13, $f14 267 ; CMOV-64: movn.d $f14, $f13, $[[T0]] [all …]
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/external/llvm/test/CodeGen/Mips/ |
D | fmadd1.ll | 26 ; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14 32 ; 32R2: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14 37 ; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14 42 ; 64-DAG: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13 46 ; 64R2: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13 51 ; 64R6-DAG: add.s $[[T1:f[0-9]+]], $[[T0]], $f14 66 ; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14 72 ; 32R2: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14 77 ; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14 82 ; 64-DAG: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13 [all …]
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D | select.ll | 149 ; 64: movn.s $f14, $f13, $4 150 ; 64: mov.s $f0, $f14 152 ; 64R2: movn.s $f14, $f13, $4 153 ; 64R2: mov.s $f0, $f14 157 ; 64R6: sel.s $[[CC]], $f14, $f13 185 ; 64: movn.d $f14, $f13, $4 186 ; 64: mov.d $f0, $f14 188 ; 64R2: movn.d $f14, $f13, $4 189 ; 64R2: mov.d $f0, $f14 193 ; 64R6: sel.d $[[CC]], $f14, $f13 [all …]
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D | fcmp.ll | 29 ; 32-C-DAG: c.eq.s $f12, $f14 36 ; 32-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f14 53 ; 32-C-DAG: c.ule.s $f12, $f14 60 ; 32-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f14, $f12 77 ; 32-C-DAG: c.ult.s $f12, $f14 84 ; 32-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f14, $f12 101 ; 32-C-DAG: c.olt.s $f12, $f14 108 ; 32-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f12, $f14 125 ; 32-C-DAG: c.ole.s $f12, $f14 132 ; 32-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f12, $f14 [all …]
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/external/llvm/test/MC/Disassembler/Mips/ |
D | mips32r2.txt | 2 # CHECK: abs.d $f12, $f14 11 # CHECK: add.d $f8, $f12, $f14 65 # CHECK: c.eq.d $f12, $f14 71 # CHECK: c.f.d $f12, $f14 77 # CHECK: c.le.d $f12, $f14 83 # CHECK: c.lt.d $f12, $f14 89 # CHECK: c.nge.d $f12, $f14 95 # CHECK: c.ngl.d $f12, $f14 101 # CHECK: c.ngle.d $f12, $f14 107 # CHECK: c.ngt.d $f12, $f14 [all …]
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D | mips32r2_le.txt | 2 # CHECK: abs.d $f12, $f14 11 # CHECK: add.d $f8, $f12, $f14 65 # CHECK: c.eq.d $f12, $f14 71 # CHECK: c.f.d $f12, $f14 77 # CHECK: c.le.d $f12, $f14 83 # CHECK: c.lt.d $f12, $f14 89 # CHECK: c.nge.d $f12, $f14 95 # CHECK: c.ngl.d $f12, $f14 101 # CHECK: c.ngle.d $f12, $f14 107 # CHECK: c.ngt.d $f12, $f14 [all …]
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D | mips32_le.txt | 2 # CHECK: abs.d $f12, $f14 11 # CHECK: add.d $f8, $f12, $f14 65 # CHECK: c.eq.d $f12, $f14 71 # CHECK: c.f.d $f12, $f14 77 # CHECK: c.le.d $f12, $f14 83 # CHECK: c.lt.d $f12, $f14 89 # CHECK: c.nge.d $f12, $f14 95 # CHECK: c.ngl.d $f12, $f14 101 # CHECK: c.ngle.d $f12, $f14 107 # CHECK: c.ngt.d $f12, $f14 [all …]
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D | mips32.txt | 3 # CHECK: abs.d $f12, $f14 12 # CHECK: add.d $f8, $f12, $f14 66 # CHECK: c.eq.d $f12, $f14 72 # CHECK: c.f.d $f12, $f14 78 # CHECK: c.le.d $f12, $f14 84 # CHECK: c.lt.d $f12, $f14 90 # CHECK: c.nge.d $f12, $f14 96 # CHECK: c.ngl.d $f12, $f14 102 # CHECK: c.ngle.d $f12, $f14 108 # CHECK: c.ngt.d $f12, $f14 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32/ |
D | valid-mips32-el.txt | 2 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14 5 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 23 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 25 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 27 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 29 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 31 0x3d 0x60 0x2e 0x46 # CHECK: c.nge.d $f12, $f14 33 0x3b 0x60 0x2e 0x46 # CHECK: c.ngl.d $f12, $f14 35 0x39 0x60 0x2e 0x46 # CHECK: c.ngle.d $f12, $f14 37 0x3f 0x60 0x2e 0x46 # CHECK: c.ngt.d $f12, $f14 [all …]
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D | valid-mips32.txt | 2 0x46 0x20 0x73 0x05 # CHECK: abs.d $f12, $f14 5 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 23 0x46 0x2e 0x60 0x32 # CHECK: c.eq.d $f12, $f14 25 0x46 0x2e 0x60 0x30 # CHECK: c.f.d $f12, $f14 27 0x46 0x2e 0x60 0x3e # CHECK: c.le.d $f12, $f14 29 0x46 0x2e 0x60 0x3c # CHECK: c.lt.d $f12, $f14 31 0x46 0x2e 0x60 0x3d # CHECK: c.nge.d $f12, $f14 33 0x46 0x2e 0x60 0x3b # CHECK: c.ngl.d $f12, $f14 35 0x46 0x2e 0x60 0x39 # CHECK: c.ngle.d $f12, $f14 37 0x46 0x2e 0x60 0x3f # CHECK: c.ngt.d $f12, $f14 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-mips32r3.txt | 2 0x46 0x20 0x73 0x05 # CHECK: abs.d $f12, $f14 5 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 23 0x46 0x2e 0x60 0x32 # CHECK: c.eq.d $f12, $f14 25 0x46 0x2e 0x60 0x30 # CHECK: c.f.d $f12, $f14 27 0x46 0x2e 0x60 0x3e # CHECK: c.le.d $f12, $f14 29 0x46 0x2e 0x60 0x3c # CHECK: c.lt.d $f12, $f14 31 0x46 0x2e 0x60 0x3d # CHECK: c.nge.d $f12, $f14 33 0x46 0x2e 0x60 0x3b # CHECK: c.ngl.d $f12, $f14 35 0x46 0x2e 0x60 0x39 # CHECK: c.ngle.d $f12, $f14 37 0x46 0x2e 0x60 0x3f # CHECK: c.ngt.d $f12, $f14 [all …]
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D | valid-mips32r3-le.txt | 2 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14 5 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 23 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 25 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 27 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 29 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 31 0x3d 0x60 0x2e 0x46 # CHECK: c.nge.d $f12, $f14 33 0x3b 0x60 0x2e 0x46 # CHECK: c.ngl.d $f12, $f14 35 0x39 0x60 0x2e 0x46 # CHECK: c.ngle.d $f12, $f14 37 0x3f 0x60 0x2e 0x46 # CHECK: c.ngt.d $f12, $f14 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-mips32r2.txt | 5 0x46 0x20 0x73 0x05 # CHECK: abs.d $f12, $f14 8 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 26 0x46 0x2e 0x60 0x32 # CHECK: c.eq.d $f12, $f14 28 0x46 0x2e 0x60 0x30 # CHECK: c.f.d $f12, $f14 30 0x46 0x2e 0x60 0x3e # CHECK: c.le.d $f12, $f14 32 0x46 0x2e 0x60 0x3c # CHECK: c.lt.d $f12, $f14 34 0x46 0x2e 0x60 0x3d # CHECK: c.nge.d $f12, $f14 36 0x46 0x2e 0x60 0x3b # CHECK: c.ngl.d $f12, $f14 38 0x46 0x2e 0x60 0x39 # CHECK: c.ngle.d $f12, $f14 40 0x46 0x2e 0x60 0x3f # CHECK: c.ngt.d $f12, $f14 [all …]
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D | valid-mips32r2-le.txt | 5 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14 8 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 26 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 28 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 30 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 32 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 34 0x3d 0x60 0x2e 0x46 # CHECK: c.nge.d $f12, $f14 36 0x3b 0x60 0x2e 0x46 # CHECK: c.ngl.d $f12, $f14 38 0x39 0x60 0x2e 0x46 # CHECK: c.ngle.d $f12, $f14 40 0x3f 0x60 0x2e 0x46 # CHECK: c.ngt.d $f12, $f14 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-mips32r5-le.txt | 2 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14 5 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14 23 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 25 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 27 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 29 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 31 0x3d 0x60 0x2e 0x46 # CHECK: c.nge.d $f12, $f14 33 0x3b 0x60 0x2e 0x46 # CHECK: c.ngl.d $f12, $f14 35 0x39 0x60 0x2e 0x46 # CHECK: c.ngle.d $f12, $f14 37 0x3f 0x60 0x2e 0x46 # CHECK: c.ngt.d $f12, $f14 [all …]
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D | valid-mips32r5.txt | 2 0x46 0x20 0x73 0x05 # CHECK: abs.d $f12, $f14 5 0x46 0x2e 0x62 0x00 # CHECK: add.d $f8, $f12, $f14 23 0x46 0x2e 0x60 0x32 # CHECK: c.eq.d $f12, $f14 25 0x46 0x2e 0x60 0x30 # CHECK: c.f.d $f12, $f14 27 0x46 0x2e 0x60 0x3e # CHECK: c.le.d $f12, $f14 29 0x46 0x2e 0x60 0x3c # CHECK: c.lt.d $f12, $f14 31 0x46 0x2e 0x60 0x3d # CHECK: c.nge.d $f12, $f14 33 0x46 0x2e 0x60 0x3b # CHECK: c.ngl.d $f12, $f14 35 0x46 0x2e 0x60 0x39 # CHECK: c.ngle.d $f12, $f14 37 0x46 0x2e 0x60 0x3f # CHECK: c.ngt.d $f12, $f14 [all …]
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