Searched refs:FpuRegister (Results 1 – 8 of 8) sorted by relevance
/art/compiler/utils/mips64/ |
D | assembler_mips64.h | 160 void AddS(FpuRegister fd, FpuRegister fs, FpuRegister ft); 161 void SubS(FpuRegister fd, FpuRegister fs, FpuRegister ft); 162 void MulS(FpuRegister fd, FpuRegister fs, FpuRegister ft); 163 void DivS(FpuRegister fd, FpuRegister fs, FpuRegister ft); 164 void AddD(FpuRegister fd, FpuRegister fs, FpuRegister ft); 165 void SubD(FpuRegister fd, FpuRegister fs, FpuRegister ft); 166 void MulD(FpuRegister fd, FpuRegister fs, FpuRegister ft); 167 void DivD(FpuRegister fd, FpuRegister fs, FpuRegister ft); 168 void MovS(FpuRegister fd, FpuRegister fs); 169 void MovD(FpuRegister fd, FpuRegister fs); [all …]
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D | assembler_mips64.cc | 71 void Mips64Assembler::EmitFR(int opcode, int fmt, FpuRegister ft, FpuRegister fs, FpuRegister fd, in EmitFR() 85 void Mips64Assembler::EmitFI(int opcode, int fmt, FpuRegister ft, uint16_t imm) { in EmitFI() 514 void Mips64Assembler::AddS(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in AddS() 518 void Mips64Assembler::SubS(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in SubS() 522 void Mips64Assembler::MulS(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in MulS() 526 void Mips64Assembler::DivS(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in DivS() 530 void Mips64Assembler::AddD(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in AddD() 534 void Mips64Assembler::SubD(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in SubD() 538 void Mips64Assembler::MulD(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in MulD() 542 void Mips64Assembler::DivD(FpuRegister fd, FpuRegister fs, FpuRegister ft) { in DivD() [all …]
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D | managed_register_mips64.h | 47 FpuRegister AsFpuRegister() const { in AsFpuRegister() 49 return static_cast<FpuRegister>(id_ - kNumberOfGpuRegIds); in AsFpuRegister() 75 static Mips64ManagedRegister FromFpuRegister(FpuRegister r) { in FromFpuRegister()
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/art/runtime/arch/mips64/ |
D | registers_mips64.h | 68 enum FpuRegister { enum 104 std::ostream& operator<<(std::ostream& os, const FpuRegister& rhs);
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D | registers_mips64.cc | 40 std::ostream& operator<<(std::ostream& os, const FpuRegister& rhs) { in operator <<()
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/art/compiler/optimizing/ |
D | code_generator_mips64.cc | 40 static constexpr FpuRegister FTMP = F8; 524 FpuRegister reg = kFpuCalleeSaves[i]; in GenerateFrameEntry() 561 FpuRegister reg = kFpuCalleeSaves[i]; in GenerateFrameExit() 629 destination.AsFpuRegister<FpuRegister>(), in MoveLocation() 651 __ Mtc1(gpr, destination.AsFpuRegister<FpuRegister>()); in MoveLocation() 653 __ Dmtc1(gpr, destination.AsFpuRegister<FpuRegister>()); in MoveLocation() 662 __ MovS(destination.AsFpuRegister<FpuRegister>(), source.AsFpuRegister<FpuRegister>()); in MoveLocation() 665 __ MovD(destination.AsFpuRegister<FpuRegister>(), source.AsFpuRegister<FpuRegister>()); in MoveLocation() 690 source.AsFpuRegister<FpuRegister>(), in MoveLocation() 743 FpuRegister r1 = loc1.AsFpuRegister<FpuRegister>(); in SwapLocations() [all …]
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D | code_generator_mips64.h | 40 static constexpr FpuRegister kParameterFpuRegisters[] = 52 static constexpr FpuRegister kRuntimeParameterFpuRegisters[] = 60 static constexpr FpuRegister kFpuCalleeSaves[] = 66 class InvokeDexCallingConvention : public CallingConvention<GpuRegister, FpuRegister> { 93 class InvokeRuntimeCallingConvention : public CallingConvention<GpuRegister, FpuRegister> {
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/art/compiler/jni/quick/mips64/ |
D | calling_convention_mips64.cc | 30 static const FpuRegister kFpuArgumentRegisters[] = { 105 FpuRegister arg = kFpuArgumentRegisters[reg_index]; in EntrySpills()
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