/art/compiler/dex/quick/mips/ |
D | utility_mips.cc | 91 res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); in OpFpRegCopy() 93 res = RawLIR(current_dalvik_offset_, opcode, r_src.GetReg(), r_dest.GetReg()); in OpFpRegCopy() 142 res = NewLIR2(kMipsMove, r_dest.GetReg(), rZERO); in LoadConstantNoClobber() 145 res = NewLIR3(kMipsOri, r_dest.GetReg(), rZERO, value); in LoadConstantNoClobber() 148 res = NewLIR3(kMipsAddiu, r_dest.GetReg(), rZERO, value); in LoadConstantNoClobber() 150 res = NewLIR2(kMipsLui, r_dest.GetReg(), value >> 16); in LoadConstantNoClobber() 152 NewLIR3(kMipsOri, r_dest.GetReg(), r_dest.GetReg(), value); in LoadConstantNoClobber() 156 NewLIR2(kMipsMtc1, r_dest.GetReg(), r_dest_save.GetReg()); in LoadConstantNoClobber() 177 res = NewLIR3(kMipsOri, r_dest.GetReg(), rZEROd, value); in LoadConstantWideNoClobber() 179 res = NewLIR3(kMips64Daddiu, r_dest.GetReg(), rZEROd, value); in LoadConstantWideNoClobber() [all …]
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D | int_mips.cc | 59 NewLIR3(kMipsSlt, temp.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenCmpLong() 60 NewLIR3(kMipsSlt, rl_result.reg.GetReg(), rl_src2.reg.GetReg(), rl_src1.reg.GetReg()); in GenCmpLong() 61 NewLIR3(kMipsSubu, rl_result.reg.GetReg(), rl_result.reg.GetReg(), temp.GetReg()); in GenCmpLong() 68 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenCmpLong() 69 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg()); in GenCmpLong() 70 NewLIR3(kMipsSubu, rl_result.reg.GetReg(), t1.GetReg(), t0.GetReg()); in GenCmpLong() 72 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); in GenCmpLong() 73 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg()); in GenCmpLong() 74 NewLIR3(kMipsSubu, rl_result.reg.GetReg(), t1.GetReg(), t0.GetReg()); in GenCmpLong() 134 branch = NewLIR2(br_op, src1.GetReg(), src2.GetReg()); in OpCmpBranch() [all …]
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D | fp_mips.cc | 68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat() 114 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble() 176 NewLIR2(op, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenConversion() 267 NewLIR2(kMipsFnegs, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenNegFloat() 281 NewLIR2(kMipsFnegd, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenNegDouble()
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D | call_mips.cc | 91 NewLIR2(kMipsLui, r_end.GetReg(), size_hi); in GenLargeSparseSwitch() 98 NewLIR3(kMipsOri, r_end.GetReg(), r_end.GetReg(), size_lo); in GenLargeSparseSwitch() 100 NewLIR3(kMipsOri, r_end.GetReg(), rZERO, size_lo); in GenLargeSparseSwitch() 109 NewLIR4(kMipsDelta, r_base.GetReg(), 0, WrapPointer(base_label), WrapPointer(tab_rec)); in GenLargeSparseSwitch() 198 NewLIR4(kMipsDelta, r_base.GetReg(), 0, WrapPointer(base_label), WrapPointer(tab_rec)); in GenLargePackedSwitch()
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D | codegen_mips.h | 303 ->GetReg().GetReg(), in As32BitReg() 304 ret_val.GetReg()); in As32BitReg() 325 ->GetReg().GetReg(), in As64BitReg() 326 ret_val.GetReg()); in As64BitReg()
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/art/compiler/dex/quick/arm/ |
D | utility_arm.cc | 98 r_dest, rs_r15pc.GetReg(), 0, 0, 0, data_target); in LoadFPConstantValue() 228 return LoadFPConstantValue(r_dest.GetReg(), value); in LoadConstantNoClobber() 233 return NewLIR2(kThumbMovImm, r_dest.GetReg(), value); in LoadConstantNoClobber() 238 res = NewLIR2(kThumb2MovI8M, r_dest.GetReg(), mod_imm); in LoadConstantNoClobber() 243 res = NewLIR2(kThumb2MvnI8M, r_dest.GetReg(), mod_imm); in LoadConstantNoClobber() 248 res = NewLIR2(kThumb2MovImm16, r_dest.GetReg(), value); in LoadConstantNoClobber() 252 res = NewLIR2(kThumb2MovImm16, r_dest.GetReg(), Low16Bits(value)); in LoadConstantNoClobber() 253 NewLIR2(kThumb2MovImm16H, r_dest.GetReg(), High16Bits(value)); in LoadConstantNoClobber() 282 return NewLIR1(opcode, r_dest_src.GetReg()); in OpReg() 376 return NewLIR3(kThumb2RevRR, r_dest_src1.GetReg(), r_src2.GetReg(), r_src2.GetReg()); in OpRegRegShift() [all …]
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D | fp_arm.cc | 68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat() 115 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble() 126 NewLIR3(kThumb2Vmuls, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()); in GenMultiplyByConstantFloat() 141 NewLIR3(kThumb2Vmuld, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()); in GenMultiplyByConstantDouble() 172 RegStorage src_low = info->FindMatchingView(RegisterInfo::kLowSingleStorageMask)->GetReg(); in GenConversion() 174 RegStorage src_high = info->FindMatchingView(RegisterInfo::kHighSingleStorageMask)->GetReg(); in GenConversion() 180 NewLIR2(kThumb2VcvtF64S32, tmp1.GetReg(), src_high.GetReg()); in GenConversion() 181 NewLIR2(kThumb2VcvtF64U32, rl_result.reg.GetReg(), src_low.GetReg()); in GenConversion() 183 NewLIR3(kThumb2VmlaF64, rl_result.reg.GetReg(), tmp1.GetReg(), tmp2.GetReg()); in GenConversion() 196 RegStorage src_low = info->FindMatchingView(RegisterInfo::kLowSingleStorageMask)->GetReg(); in GenConversion() [all …]
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D | call_arm.cc | 74 if (r_key.GetReg() > r_disp.GetReg()) { in GenLargeSparseSwitch() 80 NewLIR3(kThumb2Adr, r_base.GetReg(), 0, WrapPointer(tab_rec)); in GenLargeSparseSwitch() 87 NewLIR2(kThumb2LdmiaWB, r_base.GetReg(), (1 << r_key.GetRegNum()) | (1 << r_disp.GetRegNum())); in GenLargeSparseSwitch() 91 LIR* switch_branch = NewLIR1(kThumb2AddPCR, r_disp.GetReg()); in GenLargeSparseSwitch() 116 NewLIR3(kThumb2Adr, table_base.GetReg(), 0, WrapPointer(tab_rec)); in GenLargePackedSwitch() 135 LIR* switch_branch = NewLIR1(kThumb2AddPCR, disp_reg.GetReg()); in GenLargePackedSwitch() 164 NewLIR3(kThumb2Ldrex, rs_r1.GetReg(), rs_r0.GetReg(), in GenMonitorEnter() 172 NewLIR4(kThumb2Strex, rs_r1.GetReg(), rs_r2.GetReg(), rs_r0.GetReg(), in GenMonitorEnter() 196 NewLIR3(kThumb2Ldrex, rs_r1.GetReg(), rs_r0.GetReg(), in GenMonitorEnter() 208 NewLIR4(kThumb2Strex/*eq*/, rs_r1.GetReg(), rs_r2.GetReg(), rs_r0.GetReg(), in GenMonitorEnter() [all …]
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D | int_arm.cc | 147 NewLIR2(kThumb2MovI8M, t_reg.GetReg(), ModifiedImmediate(-1)); in GenCmpLong() 157 rl_temp.reg.SetReg(t_reg.GetReg()); in GenCmpLong() 180 NewLIR4(kThumb2OrrRRRs, t_reg.GetReg(), low_reg.GetReg(), high_reg.GetReg(), 0); in GenFusedLongCmpImmBranch() 302 if (rl_result.reg.GetReg() == rl_true.reg.GetReg()) { // Is the "true" case already in place? in GenSelect() 305 } else if (rl_result.reg.GetReg() == rl_false.reg.GetReg()) { // False case in place? in GenSelect() 397 reg.GetReg(), 0); in OpCmpImmBranch() 401 branch = NewLIR2(kThumb2Cbz, reg.GetReg(), 0); in OpCmpImmBranch() 434 res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); in OpRegCopyNoInsert() 467 NewLIR3(kThumb2Fmdrr, r_dest.GetReg(), r_src.GetLowReg(), r_src.GetHighReg()); in OpRegCopyWide() 471 NewLIR3(kThumb2Fmrrd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_src.GetReg()); in OpRegCopyWide() [all …]
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D | target_arm.cc | 607 int sp_reg_num = info->GetReg().GetRegNum(); in CompilerInitializeRegAlloc() 716 res.reg.SetLowReg(rs_r2.GetReg()); in GetReturnWideAlt() 717 res.reg.SetHighReg(rs_r3.GetReg()); in GetReturnWideAlt() 728 res.reg.SetReg(rs_r1.GetReg()); in GetReturnAlt() 858 res = RegStorage::FloatSolo64(p->GetReg().GetRegNum() >> 1); in AllocPreservedDouble() 860 MarkPreservedSingle(v_reg, p->GetReg()); in AllocPreservedDouble() 868 res = info->GetReg(); in AllocPreservedDouble() 870 MarkPreservedDouble(v_reg, info->GetReg()); in AllocPreservedDouble() 879 info->FindMatchingView(RegisterInfo::kLowSingleStorageMask)->GetReg().GetReg(); in AllocPreservedDouble() 882 info->FindMatchingView(RegisterInfo::kHighSingleStorageMask)->GetReg().GetReg(); in AllocPreservedDouble() [all …]
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/art/compiler/dex/quick/arm64/ |
D | utility_arm64.cc | 115 return NewLIR2(kA64Fmov2sw, r_dest.GetReg(), rwzr); in LoadFPConstantValue() 119 return NewLIR2(kA64Fmov2fI, r_dest.GetReg(), encoded_imm); in LoadFPConstantValue() 131 r_dest.GetReg(), 0, 0, 0, 0, data_target); in LoadFPConstantValue() 139 return NewLIR2(kA64Fmov2Sx, r_dest.GetReg(), rxzr); in LoadFPConstantValueWide() 143 return NewLIR2(WIDE(kA64Fmov2fI), r_dest.GetReg(), encoded_imm); in LoadFPConstantValueWide() 157 r_dest.GetReg(), 0, 0, 0, 0, data_target); in LoadFPConstantValueWide() 406 DCHECK(!A64_REG_IS_SP(r_dest.GetReg())); in LoadConstantNoClobber() 407 DCHECK(!A64_REG_IS_ZR(r_dest.GetReg())); in LoadConstantNoClobber() 421 res = NewLIR2(opcode, r_dest.GetReg(), rwzr); in LoadConstantNoClobber() 437 res = NewLIR3(kA64Movn3rdM, r_dest.GetReg(), ~useful_bits, shift); in LoadConstantNoClobber() [all …]
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D | fp_arm64.cc | 64 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat() 117 NewLIR3(WIDE(op), rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble() 128 NewLIR3(kA64Fmul3fff, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()); in GenMultiplyByConstantFloat() 143 NewLIR3(WIDE(kA64Fmul3fff), rl_result.reg.GetReg(), rl_src1.reg.GetReg(), r_tmp.GetReg()); in GenMultiplyByConstantDouble() 220 NewLIR2(op, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenConversion() 239 NewLIR2(WIDE(kA64Fcmp2ff), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenFusedFPCmpBranch() 245 NewLIR2(kA64Fcmp2ff, rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenFusedFPCmpBranch() 312 NewLIR2(WIDE(kA64Fcmp2ff), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenCmpFP() 320 NewLIR2(kA64Fcmp2ff, rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenCmpFP() 330 NewLIR4(kA64Csneg4rrrc, rl_result.reg.GetReg(), rl_result.reg.GetReg(), in GenCmpFP() [all …]
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D | int_arm64.cc | 65 NewLIR4(kA64Csinc4rrrc, rl_result.reg.GetReg(), rwzr, rwzr, kArmCondEq); in GenCmpLong() 66 NewLIR4(kA64Csneg4rrrc, rl_result.reg.GetReg(), rl_result.reg.GetReg(), in GenCmpLong() 67 rl_result.reg.GetReg(), kArmCondGe); in GenCmpLong() 179 NewLIR4(is_wide ? WIDE(opcode) : opcode, rs_dest.GetReg(), left_op.GetReg(), right_op.GetReg(), in GenSelect() 217 NewLIR4(opcode, rl_result.reg.GetReg(), in GenSelect() 218 rl_true.reg.GetReg(), rl_false.reg.GetReg(), ArmConditionEncoding(mir->meta.ccode)); in GenSelect() 276 branch = NewLIR2(opcode | wide, reg.GetReg(), 0); in OpCmpImmBranch() 282 branch = NewLIR2(opcode | wide, reg.GetReg(), 0); in OpCmpImmBranch() 287 branch = NewLIR3(opcode | wide, reg.GetReg(), value, 0); in OpCmpImmBranch() 326 opcode = UNLIKELY(A64_REG_IS_SP(r_dest.GetReg())) ? kA64Add4RRdT : kA64Mov2rr; in OpRegCopyNoInsert() [all …]
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D | call_arm64.cc | 73 NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, WrapPointer(tab_rec)); in GenLargeSparseSwitch() 80 LIR* branch_out = NewLIR2(kA64Cbz2rt, r_idx.GetReg(), 0); in GenLargeSparseSwitch() 83 NewLIR4(kA64LdpPost4rrXD, r_key.GetReg(), r_disp.GetReg(), r_base.GetReg(), 2); in GenLargeSparseSwitch() 91 LIR* switch_label = NewLIR3(kA64Adr2xd, r_base.GetReg(), 0, -1); in GenLargeSparseSwitch() 96 NewLIR1(kA64Br1x, r_base.GetReg()); in GenLargeSparseSwitch() 119 NewLIR3(kA64Adr2xd, table_base.GetReg(), 0, WrapPointer(tab_rec)); in GenLargePackedSwitch() 139 LIR* switch_label = NewLIR3(kA64Adr2xd, branch_reg.GetReg(), 0, -1); in GenLargePackedSwitch() 144 NewLIR1(kA64Br1x, branch_reg.GetReg()); in GenLargePackedSwitch() 377 m2l_->NewLIR1(kA64Br1x, rs_xIP0.GetReg()); in GenEntrySequence() 435 NewLIR4(WIDE(kA64StpPre4rrXD), rs_x0.GetReg(), rs_xLR.GetReg(), rs_sp.GetReg(), -frame_size_ / 8); in GenSpecialEntryForSuspend() [all …]
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D | codegen_arm64.h | 287 ->GetReg().GetReg(), in As32BitReg() 288 ret_val.GetReg()); in As32BitReg() 323 ->GetReg().GetReg(), in As64BitReg() 324 ret_val.GetReg()); in As64BitReg()
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/art/compiler/dex/quick/x86/ |
D | utility_x86.cc | 53 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg()); in OpFpRegCopy() 91 return NewLIR2(kX86XorpsRR, r_dest.GetReg(), r_dest.GetReg()); in LoadConstantNoClobber() 98 res = NewLIR2(kX86Xor32RR, r_dest.GetReg(), r_dest.GetReg()); in LoadConstantNoClobber() 102 res = NewLIR2(kX86Mov32RI, r_dest.GetReg(), value); in LoadConstantNoClobber() 106 NewLIR2(kX86MovdxrRR, r_dest_save.GetReg(), r_dest.GetReg()); in LoadConstantNoClobber() 136 return NewLIR1(opcode, r_dest_src.GetReg()); in OpReg() 177 return NewLIR3(opcode, r_dest_src1.GetReg(), r_dest_src1.GetReg(), value); in OpRegImm() 198 return NewLIR2(opcode, r_dest_src1.GetReg(), value); in OpRegImm() 238 NewLIR2(is64Bit ? kX86Mov64RR : kX86Mov32RR, r_dest_src1.GetReg(), r_src2.GetReg()); in OpRegReg() 239 NewLIR2(is64Bit ? kX86Sal64RI : kX86Sal32RI, r_dest_src1.GetReg(), is64Bit ? 56 : 24); in OpRegReg() [all …]
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D | fp_x86.cc | 73 NewLIR2(op, r_dest.GetReg(), r_src2.GetReg()); in GenArithOpFloat() 123 NewLIR2(op, rl_result.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpDouble() 170 LIR *fild64 = NewLIR2NoDest(kX86Fild64M, rs_rX86_SP_32.GetReg(), in GenLongToFP() 178 LIR *fstp = NewLIR2NoDest(opcode, rs_rX86_SP_32.GetReg(), displacement); in GenLongToFP() 240 NewLIR2(kX86Cvtsi2ssRR, temp_reg.GetReg(), rl_result.reg.GetReg()); in GenConversion() 241 NewLIR2(kX86ComissRR, rl_src.reg.GetReg(), temp_reg.GetReg()); in GenConversion() 244 NewLIR2(kX86Cvttss2siRR, rl_result.reg.GetReg(), rl_src.reg.GetReg()); in GenConversion() 247 NewLIR2(kX86Xor32RR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); in GenConversion() 261 NewLIR2(kX86Cvtsi2sdRR, temp_reg.GetReg(), rl_result.reg.GetReg()); in GenConversion() 262 NewLIR2(kX86ComisdRR, rl_src.reg.GetReg(), temp_reg.GetReg()); in GenConversion() [all …]
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D | target_x86.cc | 292 SetupRegMask(def_mask, rs_rAX.GetReg()); in SetupTargetResourceMasks() 296 SetupRegMask(def_mask, rs_rDX.GetReg()); in SetupTargetResourceMasks() 299 SetupRegMask(use_mask, rs_rAX.GetReg()); in SetupTargetResourceMasks() 303 SetupRegMask(use_mask, rs_rCX.GetReg()); in SetupTargetResourceMasks() 307 SetupRegMask(use_mask, rs_rDX.GetReg()); in SetupTargetResourceMasks() 311 SetupRegMask(use_mask, rs_rBX.GetReg()); in SetupTargetResourceMasks() 316 SetupRegMask(use_mask, rs_rAX.GetReg()); in SetupTargetResourceMasks() 317 SetupRegMask(use_mask, rs_rCX.GetReg()); in SetupTargetResourceMasks() 318 SetupRegMask(use_mask, rs_rDI.GetReg()); in SetupTargetResourceMasks() 319 SetupRegMask(def_mask, rs_rDI.GetReg()); in SetupTargetResourceMasks() [all …]
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D | int_x86.cc | 45 NewLIR2(kX86Set8R, rl_result.reg.GetReg(), kX86CondG); // result = (src1 > src2) ? 1 : 0 in GenCmpLong() 46 NewLIR2(kX86Set8R, temp_reg.GetReg(), kX86CondL); // temp = (src1 >= src2) ? 0 : 1 in GenCmpLong() 47 NewLIR2(kX86Sub8RR, rl_result.reg.GetReg(), temp_reg.GetReg()); in GenCmpLong() 48 NewLIR2(kX86Movsx8qRR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); in GenCmpLong() 64 NewLIR2(kX86Set8R, rs_r2.GetReg(), kX86CondL); // r2 = (r1:r0) < (r3:r2) ? 1 : 0 in GenCmpLong() 65 NewLIR2(kX86Movzx8RR, rs_r2.GetReg(), rs_r2.GetReg()); in GenCmpLong() 68 NewLIR2(kX86Set8R, rs_r0.GetReg(), kX86CondNz); // r0 = (r1:r0) != (r3:r2) ? 1 : 0 in GenCmpLong() 100 NewLIR2(src1.Is64Bit() ? kX86Cmp64RR : kX86Cmp32RR, src1.GetReg(), src2.GetReg()); in OpCmpBranch() 112 NewLIR2(reg.Is64Bit() ? kX86Test64RR: kX86Test32RR, reg.GetReg(), reg.GetReg()); in OpCmpImmBranch() 115 NewLIR2(IS_SIMM8(check_value) ? kX86Cmp64RI8 : kX86Cmp64RI, reg.GetReg(), check_value); in OpCmpImmBranch() [all …]
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D | quick_assemble_x86_test.cc | 165 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); in TEST_F() 167 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); in TEST_F() 172 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); in TEST_F() 174 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); in TEST_F() 179 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); in TEST_F() 181 RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); in TEST_F() 186 RegStorage::Solo32(r0).GetReg(), 8, RegStorage::Solo128(3).GetReg(), 7); in TEST_F() 188 RegStorage::Solo64(r10q).GetReg(), 8, RegStorage::Solo128(8).GetReg(), 7); in TEST_F()
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D | call_x86.cc | 90 LIR* lea = RawLIR(current_dalvik_offset_, kX86Lea64RM, table_base.GetReg(), kRIPReg, in GenLargePackedSwitch() 97 NewLIR5(kX86MovsxdRA, addr_for_jump.GetReg(), table_base.GetReg(), keyReg.GetReg(), 2, 0); in GenLargePackedSwitch() 109 NewLIR5(kX86PcRelLoadRA, addr_for_jump.GetReg(), r_pc.GetReg(), keyReg.GetReg(), in GenLargePackedSwitch() 117 NewLIR1(kX86JmpR, addr_for_jump.GetReg()); in GenLargePackedSwitch() 129 NewLIR2(cu_->target64 ? kX86Mov64RT : kX86Mov32RT, rl_result.reg.GetReg(), ex_offset); in GenMoveException() 141 NewLIR2(cu_->target64 ? kX86Mov64RT : kX86Mov32RT, reg_card_base.GetReg(), ct_offset); in UnconditionallyMarkGCCard() 181 NewLIR3(kX86Test32RM, rs_rAX.GetReg(), rs_rSP.GetReg(), -overflow); in GenEntrySequence() 303 NewLIR1(kX86Push32R, rs_rDI.GetReg()); in GenSpecialEntryForSuspend() 306 NewLIR1(kX86Push32R, rs_rSI.GetReg()); in GenSpecialEntryForSuspend() 310 NewLIR1(kX86Push32R, TargetReg(kArg0, kRef).GetReg()); // ArtMethod* in GenSpecialEntryForSuspend() [all …]
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D | codegen_x86.h | 397 LOG(FATAL) << "Expected 64b register " << reg.GetReg(); in As32BitReg() 399 LOG(WARNING) << "Expected 64b register " << reg.GetReg(); in As32BitReg() 406 ->GetReg().GetReg(), in As32BitReg() 407 ret_val.GetReg()); in As32BitReg() 415 LOG(FATAL) << "Expected 32b register " << reg.GetReg(); in As64BitReg() 417 LOG(WARNING) << "Expected 32b register " << reg.GetReg(); in As64BitReg() 424 ->GetReg().GetReg(), in As64BitReg() 425 ret_val.GetReg()); in As64BitReg()
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/art/compiler/dex/quick/ |
D | ralloc_util.cc | 85 m2l_->reginfo_map_[reg.GetReg()] = info; in RegisterPool() 91 m2l_->reginfo_map_[reg.GetReg()] = info; in RegisterPool() 97 m2l_->reginfo_map_[reg.GetReg()] = info; in RegisterPool() 103 m2l_->reginfo_map_[reg.GetReg()] = info; in RegisterPool() 131 m2l_->reginfo_map_[RegStorage::InvalidReg().GetReg()] = invalid_reg; in RegisterPool() 148 info->GetReg().GetReg(), info->GetReg().GetRegNum(), info->GetReg().IsFloat() ? 'f' : 'c', in DumpRegPool() 149 info->IsTemp(), info->InUse(), info->IsWide(), info->Partner().GetReg(), info->IsLive(), in DumpRegPool() 181 if (info->GetReg().NotExactlyEquals(info->Partner())) { in Clobber() 227 if (info->GetReg().NotExactlyEquals(info->Partner())) { in ClobberSReg() 282 res = info->GetReg(); in AllocPreservedCoreReg() [all …]
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D | quick_cfi_test.cc | 93 m2l->core_spill_mask_ |= 1 << info->GetReg().GetRegNum(); in TestImpl() 99 m2l->fp_spill_mask_ |= 1 << info->GetReg().GetRegNum(); in TestImpl()
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/art/compiler/dex/ |
D | reg_storage.h | 209 int GetReg() const { in GetReg() function 277 return RegStorage(k64BitPair, low.GetReg(), high.GetReg()); in MakeRegPair()
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