/art/compiler/dex/quick/x86/ |
D | int_x86.cc | 44 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong() 62 OpRegReg(kOpSub, rs_r0, rs_r2); // r0 = r0 - r2 in GenCmpLong() 63 OpRegReg(kOpSbc, rs_r1, rs_r3); // r1 = r1 - r3 - CF in GenCmpLong() 67 OpRegReg(kOpOr, rs_r0, rs_r1); // r0 = high | low - sets ZF in GenCmpLong() 70 OpRegReg(kOpOr, rs_r0, rs_r2); // r0 = r0 | r2 in GenCmpLong() 232 OpRegReg(kOpCmp, left_op, right_op); in GenSelectConst32() 252 OpRegReg(kOpCmp, left_op, right_op); in GenSelectConst32() 327 OpRegReg(kOpXor, rl_result.reg, rl_result.reg); in GenSelect() 409 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenFusedLongCmpBranch() 424 OpRegReg(kOpSub, rs_r2, rs_r0); // r2 = r2 - r0 in GenFusedLongCmpBranch() [all …]
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D | call_x86.cc | 100 OpRegReg(kOpAdd, addr_for_jump, table_base); in GenLargePackedSwitch() 112 OpRegReg(kOpAdd, addr_for_jump, r_pc); in GenLargePackedSwitch()
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D | utility_x86.cc | 201 LIR* X86Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() function in art::X86Mir2Lir 470 return OpRegReg(op, r_dest, r_src2); in OpRegRegReg() 473 return OpRegReg(op, r_dest, r_src2); in OpRegRegReg() 484 OpRegReg(op, t_reg, r_src2); in OpRegRegReg() 500 return OpRegReg(op, r_dest, r_src1); in OpRegRegReg()
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D | target_x86.cc | 1334 OpRegReg(kOpMov, rs_tmp, rs_rCX); in GenInlinedIndexOf() 1350 OpRegReg(kOpMov, rs_tmp, rs_rCX); in GenInlinedIndexOf() 1370 OpRegReg(kOpXor, rs_tmp, rs_tmp); in GenInlinedIndexOf() 1371 OpRegReg(kOpCmp, rs_rDI, rs_tmp); in GenInlinedIndexOf() 1379 OpRegReg(kOpMov, rs_tmp, rs_rCX); in GenInlinedIndexOf() 1382 OpRegReg(kOpSub, rs_rCX, rs_rDI); in GenInlinedIndexOf() 1392 OpRegReg(kOpAdd, rs_rDI, rs_rDX); in GenInlinedIndexOf() 1404 OpRegReg(kOpSub, rs_tmp, rs_rCX); in GenInlinedIndexOf() 2123 OpRegReg(kOpAdd, rl_result.reg, temp); in GenAddReduceVector()
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D | codegen_x86.h | 308 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
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/art/compiler/dex/quick/arm/ |
D | int_arm.cc | 36 OpRegReg(kOpCmp, src1, src2); in OpCmpBranch() 140 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenCmpLong() 152 OpRegReg(kOpNeg, t_reg, t_reg); in GenCmpLong() 235 OpRegReg(kOpCmp, left_op, right_op); // Same? in GenSelectConst32() 341 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenFusedLongCmpBranch() 372 OpRegReg(kOpCmp, rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenFusedLongCmpBranch() 552 OpRegReg(kOpAdd, r_hi, rl_src.reg); in SmallLiteralDivRem() 757 OpRegReg(kOpMul, temp, reg2); in GenDivRem() 776 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenInlinedMinMax() 778 OpRegReg(kOpMov, rl_result.reg, rl_src2.reg); in GenInlinedMinMax() [all …]
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D | call_arm.cc | 88 OpRegReg(kOpCmp, r_key, rl_src.reg); in GenLargeSparseSwitch() 298 OpRegReg(kOpCmp, rs_r3, rs_r2); in GenMonitorExit()
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D | codegen_arm.h | 212 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
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D | utility_arm.cc | 418 LIR* ArmMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() function in art::ArmMir2Lir 630 OpRegReg(kOpCmp, r_src1, r_tmp); in OpRegRegImm()
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/art/compiler/dex/quick/mips/ |
D | int_mips.cc | 612 OpRegReg(kOpMvn, rl_result.reg, rl_src.reg); in GenNotLong() 645 OpRegReg(kOpNeg, rl_result.reg, rl_src.reg); in GenNegLong() 654 OpRegReg(kOpNeg, rl_result.reg.GetLow(), rl_src.reg.GetLow()); in GenNegLong() 655 OpRegReg(kOpNeg, rl_result.reg.GetHigh(), rl_src.reg.GetHigh()); in GenNegLong() 705 OpRegReg(kOpAdd, reg_ptr, r_new_index); in GenArrayGet() 708 OpRegReg(kOpAdd, reg_ptr, rl_index.reg); in GenArrayGet() 799 OpRegReg(kOpAdd, reg_ptr, r_new_index); in GenArrayPut() 802 OpRegReg(kOpAdd, reg_ptr, rl_index.reg); in GenArrayPut()
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D | codegen_mips.h | 209 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
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D | utility_mips.cc | 466 LIR* MipsMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() function in art::MipsMir2Lir
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/art/compiler/dex/quick/ |
D | gen_invoke.cc | 1008 OpRegReg(kOpCmp, rl_idx.reg, reg_max); in GenInlinedCharAt() 1057 OpRegReg(kOpAdd, reg_dst_ptr, cu_->instruction_set == kArm64 ? reg_tmp_ptr : reg_tmp); in GenInlinedStringGetCharsNoCheck() 1061 OpRegReg(kOpSub, reg_length, reg_tmp); in GenInlinedStringGetCharsNoCheck() 1067 OpRegReg(kOpAdd, reg_src_ptr, cu_->instruction_set == kArm64 ? reg_tmp_ptr : reg_tmp); in GenInlinedStringGetCharsNoCheck() 1099 OpRegReg(kOpNeg, t_reg, rl_result.reg); in GenInlinedStringIsEmptyOrLength() 1181 OpRegReg(kOpRev, rl_result.reg, rl_i.reg); in GenInlinedReverseBytes() 1191 OpRegReg(kOpRev, rl_result.reg.GetLow(), rl_i.reg.GetHigh()); in GenInlinedReverseBytes() 1192 OpRegReg(kOpRev, rl_result.reg.GetHigh(), r_i_low); in GenInlinedReverseBytes() 1200 OpRegReg(op, rl_result.reg, rl_i.reg); in GenInlinedReverseBytes() 1219 OpRegReg(kOpXor, rl_result.reg, sign_reg); in GenInlinedAbsInt() [all …]
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D | gen_common.cc | 478 OpRegReg(op, rl_result.reg, rl_src.reg); in GenIntNarrowing() 1196 OpRegReg(kOpCmp, check_class, object_class); // Same? in GenInstanceofFinal() 1285 OpRegReg(kOpCmp, ref_class_reg, class_reg); // Same? in GenInstanceofCallingHelper() 1593 OpRegReg(op, rl_result.reg, rl_src1.reg); in GenArithOpInt() 1817 OpRegReg(kOpNeg, rl_result.reg, rl_src.reg); in GenArithOpIntLit() 1973 OpRegReg(kOpMvn, rl_result.reg.GetLow(), rl_src2.reg.GetLow()); in GenArithOpLong() 1974 OpRegReg(kOpMvn, rl_result.reg.GetHigh(), t_reg); in GenArithOpLong() 1977 OpRegReg(kOpMvn, rl_result.reg.GetLow(), rl_src2.reg.GetLow()); in GenArithOpLong() 1978 OpRegReg(kOpMvn, rl_result.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenArithOpLong()
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D | mir_to_lir.h | 1420 virtual LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) = 0;
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/art/compiler/dex/quick/arm64/ |
D | int_arm64.cc | 36 OpRegReg(kOpCmp, src1, src2); in OpCmpBranch() 64 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong() 187 OpRegReg(kOpCmp, left_op, right_op); in GenSelectConst32() 259 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenFusedLongCmpBranch() 701 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenInlinedMinMax() 804 OpRegReg(kOpCmp, r_tmp, rl_expected.reg); in GenInlinedCas() 864 OpRegReg(kOpSub, rs_arr_length, rs_src_pos); in GenInlinedArrayCopyCharArray() 871 OpRegReg(kOpSub, rs_arr_length, rs_dst_pos); in GenInlinedArrayCopyCharArray() 879 OpRegReg(kOpAdd, rs_src, rs_src_pos); in GenInlinedArrayCopyCharArray() 884 OpRegReg(kOpAdd, rs_dst, rs_dst_pos); in GenInlinedArrayCopyCharArray()
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D | call_arm64.cc | 87 OpRegReg(kOpCmp, r_key, rl_src.reg); in GenLargeSparseSwitch()
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D | utility_arm64.cc | 664 LIR* Arm64Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { in OpRegReg() function in art::Arm64Mir2Lir 975 OpRegReg(op, r_dest_src1, r_tmp); in OpRegImm64()
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D | codegen_arm64.h | 215 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
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