| /art/compiler/dex/quick/mips/ |
| D | call_mips.cc | 233 StoreBaseIndexed(reg_card_base, reg_card_no, As32BitReg(reg_card_base), 0, kUnsignedByte); in UnconditionallyMarkGCCard()
238 StoreBaseIndexed(reg_card_base, reg_card_no, reg_card_base, 0, kUnsignedByte); in UnconditionallyMarkGCCard()
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| D | codegen_mips.h | 92 LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale,
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| D | int_mips.cc | 818 StoreBaseIndexed(reg_ptr, rl_index.reg, rl_src.reg, scale, size); in GenArrayPut()
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| D | utility_mips.cc | 643 LIR* MipsMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed() function in art::MipsMir2Lir
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| /art/compiler/dex/quick/x86/ |
| D | call_x86.cc | 143 StoreBaseIndexed(reg_card_base, reg_card_no, reg_card_base, 0, kUnsignedByte); in UnconditionallyMarkGCCard()
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| D | codegen_x86.h | 101 LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale,
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| D | utility_x86.cc | 905 LIR* X86Mir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed() function in art::X86Mir2Lir
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| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 896 StoreBaseIndexed(rs_dst, rs_length, rs_tmp, 0, kSignedHalf); in GenInlinedArrayCopyCharArray()
903 StoreBaseIndexed(rs_dst, rs_length, rs_tmp, 0, k32); in GenInlinedArrayCopyCharArray()
912 StoreBaseIndexed(rs_dst, rs_length, rs_tmp, 0, k64); in GenInlinedArrayCopyCharArray()
1331 StoreBaseIndexed(reg_ptr, rl_index.reg, rl_src.reg, scale, size); in GenArrayPut()
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| D | call_arm64.cc | 280 StoreBaseIndexed(reg_card_base, reg_card_no, As32BitReg(reg_card_base), in UnconditionallyMarkGCCard()
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| D | utility_arm64.cc | 1109 LIR* Arm64Mir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed() function in art::Arm64Mir2Lir
1348 store = StoreBaseIndexed(r_base, r_scratch, in StoreBaseDispBody()
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| D | codegen_arm64.h | 75 LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale,
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| /art/compiler/dex/quick/arm/ |
| D | codegen_arm.h | 79 LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale,
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| D | utility_arm.cc | 814 LIR* ArmMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, in StoreBaseIndexed() function in art::ArmMir2Lir
1159 store = StoreBaseIndexed(r_base, r_scratch, r_src, scale, size); in StoreBaseDispBody()
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| D | int_arm.cc | 1058 StoreBaseIndexed(rs_dst, rs_length, rs_tmp, 0, kSignedHalf); in GenInlinedArrayCopyCharArray()
1065 StoreBaseIndexed(rs_dst, rs_length, rs_tmp, 0, k32); in GenInlinedArrayCopyCharArray()
1538 StoreBaseIndexed(reg_ptr, rl_index.reg, rl_src.reg, scale, size); in GenArrayPut()
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| D | call_arm.cc | 354 StoreBaseIndexed(reg_card_base, reg_card_no, reg_card_base, 0, kUnsignedByte); in UnconditionallyMarkGCCard()
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| /art/compiler/dex/quick/ |
| D | mir_to_lir.h | 1015 return StoreBaseIndexed(r_base, r_index, r_src, scale, kReference); in StoreRefIndexed()
1159 virtual LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src,
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| D | gen_invoke.cc | 1507 StoreBaseIndexed(rl_object.reg, rl_offset.reg, rl_value.reg, 0, k64); in GenInlinedUnsafePut()
1519 StoreBaseIndexed(rl_object.reg, rl_offset.reg, rl_value.reg, 0, k32); in GenInlinedUnsafePut()
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| D | gen_common.cc | 618 StoreBaseIndexed(r_dst, r_idx, r_val, 2, k32); in GenFilledNewArray()
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