| /external/valgrind/auxprogs/ |
| D | ppcfround.c | 119 #define INSN(name,insn) \ macro
161 INSN(fabs, "fabs %%f4, %%f1");
162 INSN(fabs_, "fabs. %%f4, %%f1");
164 INSN(fnabs, "fnabs %%f4, %%f1");
165 INSN(fnabs_, "fnabs. %%f4, %%f1");
167 INSN(fadd, "fadd %%f4, %%f1,%%f2");
168 INSN(fadd_, "fadd. %%f4, %%f1,%%f2");
170 INSN(fadds, "fadds %%f4, %%f1,%%f2");
171 INSN(fadds_, "fadds. %%f4, %%f1,%%f2");
173 INSN(fcfid, "fcfid %%f4, %%f1");
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| /external/valgrind/VEX/priv/ |
| D | guest_arm64_toIR.c | 2392 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_ARM64_data_processing_immediate() macro
2404 if (INSN(28,24) == BITS5(1,0,0,0,1)) { in dis_ARM64_data_processing_immediate()
2405 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_immediate()
2406 Bool isSub = INSN(30,30) == 1; in dis_ARM64_data_processing_immediate()
2407 Bool setCC = INSN(29,29) == 1; in dis_ARM64_data_processing_immediate()
2408 UInt sh = INSN(23,22); in dis_ARM64_data_processing_immediate()
2409 UInt uimm12 = INSN(21,10); in dis_ARM64_data_processing_immediate()
2410 UInt nn = INSN(9,5); in dis_ARM64_data_processing_immediate()
2411 UInt dd = INSN(4,0); in dis_ARM64_data_processing_immediate()
2460 if (INSN(28,24) == BITS5(1,0,0,0,0)) { in dis_ARM64_data_processing_immediate()
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| D | guest_arm_toIR.c | 5245 # define INSN(_bMax,_bMin) SLICE_UInt(theInstr, (_bMax), (_bMin)) in dis_neon_data_2reg_and_scalar() macro
5246 UInt U = INSN(24,24); in dis_neon_data_2reg_and_scalar()
5250 UInt size = INSN(21,20); in dis_neon_data_2reg_and_scalar()
5252 UInt Q = INSN(24,24); in dis_neon_data_2reg_and_scalar()
5254 if (INSN(27,25) != 1 || INSN(23,23) != 1 in dis_neon_data_2reg_and_scalar()
5255 || INSN(6,6) != 1 || INSN(4,4) != 0) in dis_neon_data_2reg_and_scalar()
5259 if ((INSN(11,8) & BITS4(1,0,1,0)) == BITS4(0,0,0,0)) { in dis_neon_data_2reg_and_scalar()
5317 if (INSN(8,8)) { in dis_neon_data_2reg_and_scalar()
5350 op2 = INSN(10,10) ? sub : add; in dis_neon_data_2reg_and_scalar()
5358 DIP("vml%c.%c%u %c%u, %c%u, d%u[%u]\n", INSN(10,10) ? 's' : 'a', in dis_neon_data_2reg_and_scalar()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZPatterns.td | 10 // Record that INSN performs a 64-bit version of unary operator OPERATOR
19 // Record that INSN performs a 64-bit version of binary operator OPERATOR
39 // Record that INSN performs a binary read-modify-write operation,
49 // Record that INSN performs binary operation OPERATION on a byte
57 // Record that INSN performs insertion TYPE into a register of class CLS.
69 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
76 // INSN and INSNY are an RX/RXY pair of instructions that store the low
85 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
96 // INSN and INSNINV conditionally store the low 32 bits of a GPR to memory,
97 // with INSN storing when the condition is true and INSNINV storing when the
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| D | SystemZInstrFormats.td | 31 // Many register-based <INSN>R instructions have a memory-based <INSN>
32 // counterpart. OpKey uniquely identifies <INSN>, while OpType is
33 // "reg" for <INSN>R and "mem" for <INSN>.
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| /external/mockito/cglib-and-asm/src/org/mockito/asm/tree/ |
| D | InsnNode.java | 66 return INSN; in getType()
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| D | AbstractInsnNode.java | 48 public static final int INSN = 0; field in AbstractInsnNode
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| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.c | 247 #define GEN_UNARY_TEST(INSN,SUFFIXD,SUFFIXN) \ argument
249 static void test_##INSN##_##SUFFIXD##_##SUFFIXN ( LaneTy ty ) { \
260 #INSN " v8." #SUFFIXD ", v7." #SUFFIXN " ; " \
265 printf(#INSN " v8." #SUFFIXD ", v7." #SUFFIXN); \
275 #define GEN_BINARY_TEST(INSN,SUFFIXD,SUFFIXN,SUFFIXM) \ argument
277 static void test_##INSN##_##SUFFIXD##_##SUFFIXN##_##SUFFIXM ( LaneTy ty ) { \
290 #INSN " v9." #SUFFIXD ", v7." #SUFFIXN ", v8." #SUFFIXM " ; " \
295 printf(#INSN " v9." #SUFFIXD \
307 #define GEN_SHIFT_TEST(INSN,SUFFIXD,SUFFIXN,AMOUNT) \ argument
309 static void test_##INSN##_##SUFFIXD##_##SUFFIXN##_##AMOUNT ( LaneTy ty ) { \
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| D | memory.c | 347 #define MEM_TEST(INSN, AREG1OFF, AREG2VAL) { \ argument
370 INSN " ; " \
383 INSN, (Long)AREG1OFF, (Long)AREG2VAL); \
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| /external/owasp/sanitizer/tools/findbugs/lib/ |
| D | asm-tree-3.3.jar | META-INF/MANIFEST.MF
org/objectweb/asm/tree/AbstractInsnNode.class
< ... |
| D | asm-xml-3.3.jar | META-INF/MANIFEST.MF
org/objectweb/asm/xml/ASMContentHandler$AnnotationDefaultRule. ... |
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
| D | org.objectweb.asm_3.2.0.v200909071300.jar | META-INF/MANIFEST.MF
META-INF/ECLIPSEF.SF
META-INF/ECLIPSEF ... |
| /external/robolectric/lib/test/ |
| D | mockito-core-1.8.5.jar | META-INF/
META-INF/MANIFEST.MF
org/
org/mockito/
org/ ... |
| /external/vogar/lib/ |
| D | mockito-all-1.8.5.jar | META-INF/
META-INF/MANIFEST.MF
org/
org/hamcrest/
org/ ... |
| /external/dexmaker/lib/ |
| D | mockito-core-1.9.1-SNAPSHOT.jar | META-INF/
META-INF/MANIFEST.MF
org/
org/mockito/
org/ ... |