| /external/pcre/dist/sljit/ |
| D | sljitNativePPC_64.c | 55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
59 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
77 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp >> 32))); in load_immediate()
89 return push_inst(compiler, ORI | S(reg) | A(reg) | tmp2); in load_immediate()
96 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp2)) : SLJIT_SUCCESS; in load_immediate()
107 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | (tmp2 >> 48))); in load_immediate()
113 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm >> 32))); in load_immediate()
116 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)); in load_immediate()
312 return push_inst(compiler, ORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
320 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
[all …]
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| D | sljitNativeMIPS_64.c | 38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
45 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
81 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 32), dst_ar)); in load_immediate()
89 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
114 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
118 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
234 …FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM((op & SLJIT_INT_OP) ? 32 : 64), UNMOVABLE_I… in emit_single_op()
257 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG)); in emit_single_op()
293 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG)); in emit_single_op()
415 EMIT_LOGICAL(ORI, OR); in emit_single_op()
[all …]
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| D | sljitNativePPC_32.c | 35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
185 return push_inst(compiler, ORI | S(src1) | A(dst) | compiler->imm); in emit_single_op()
193 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
250 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(init_value)); in emit_const()
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| D | sljitNativeMIPS_32.c | 32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
38 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
142 FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM(32), UNMOVABLE_INS)); in emit_single_op()
165 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(ULESS_FLAG) | IMM(src2), ULESS_FLAG)); in emit_single_op()
201 FAIL_IF(push_inst(compiler, ORI | S(src1) | TA(OVERFLOW_FLAG) | IMM(src2), OVERFLOW_FLAG)); in emit_single_op()
320 EMIT_LOGICAL(ORI, OR); in emit_single_op()
347 return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst)); in emit_const()
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| D | sljitNativeTILEGX_64.c | 426 #define ORI(dst, srca, imm) \ macro
1718 FAIL_IF(ORI(ULESS_FLAG ,reg_map[src1], src2)); in emit_single_op()
1780 FAIL_IF(ORI(TMP_EREG1, reg_map[src1], src2)); in emit_single_op()
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| /external/valgrind/none/tests/mips64/ |
| D | logical_instructions.c | 7 OR, ORI, XOR, XORI enumerator
68 case ORI: in main()
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| /external/v8/src/mips64/ |
| D | assembler-mips64-inl.h | 354 (instr1 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
356 (instr3 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
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| D | constants-mips64.cc | 320 case ORI: in InstructionType()
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| D | assembler-mips64.cc | 554 return opcode == ORI; in IsOri()
1640 GenInstrImmediate(ORI, rs, rt, j); in ori()
2806 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) && in target_address_at()
2807 (GetOpcodeField(instr3) == ORI)) { in target_address_at()
2862 CHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI && in set_target_address_at()
2863 GetOpcodeField(instr3) == ORI)); in set_target_address_at()
2872 *(p + 1) = ORI | (rt_code << kRtShift) | (rt_code << kRsShift) in set_target_address_at()
2874 *(p + 3) = ORI | (rt_code << kRsShift) | (rt_code << kRtShift) in set_target_address_at()
2896 DCHECK(GetOpcodeField(instr2) == ORI); in JumpLabelToJumpRegister()
2904 DCHECK(GetOpcodeField(instr2) == ORI); in JumpLabelToJumpRegister()
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| D | constants-mips64.h | 294 ORI = ((1 << 3) + 5) << kOpcodeShift, enumerator
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| D | disasm-mips64.cc | 1282 case ORI: in DecodeTypeImmediate()
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| D | simulator-mips64.cc | 2971 case ORI: in DecodeTypeImmediate()
3107 case ORI: in DecodeTypeImmediate()
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| D | macro-assembler-mips64.cc | 5524 scratch, Operand(ORI)); in PatchRelocatedValue()
5536 scratch, Operand(ORI)); in PatchRelocatedValue()
5566 scratch, Operand(ORI)); in GetRelocatedValue()
5579 scratch, Operand(ORI)); in GetRelocatedValue()
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| /external/v8/src/mips/ |
| D | constants-mips.cc | 302 case ORI: in InstructionType()
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| D | assembler-mips.cc | 582 return opcode == ORI; in IsOri()
1576 GenInstrImmediate(ORI, rs, rt, j); in ori()
2560 if ((GetOpcodeField(instr1) == LUI) && (GetOpcodeField(instr2) == ORI)) { in target_address_at()
2599 CHECK((GetOpcodeField(instr1) == LUI && GetOpcodeField(instr2) == ORI)); in set_target_address_at()
2606 *(p + 1) = ORI | rt_code | (rt_code << 5) | (itarget & kImm16Mask); in set_target_address_at()
2707 DCHECK(GetOpcodeField(instr2) == ORI); in JumpLabelToJumpRegister()
2715 DCHECK(GetOpcodeField(instr2) == ORI); in JumpLabelToJumpRegister()
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| D | assembler-mips-inl.h | 357 (instr1 & kOpcodeMask) == ORI && in IsPatchedReturnSequence()
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| D | constants-mips.h | 329 ORI = ((1 << 3) + 5) << kOpcodeShift, enumerator
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| D | disasm-mips.cc | 1151 case ORI: in DecodeTypeImmediate()
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| D | simulator-mips.cc | 2835 case ORI: in DecodeTypeImmediate()
2957 case ORI: in DecodeTypeImmediate()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 352 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
356 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
378 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
629 : PPC::ORI ); in emitPrologue()
970 : PPC::ORI ); in emitEpilogue()
1600 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI; in eliminateCallFramePseudoInstr()
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| D | PPCFastISel.cpp | 1190 Opc = PPC::ORI; in SelectBinaryIntOp()
1995 TII.get(IsGPRC ? PPC::ORI : PPC::ORI8), ResultReg) in PPCMaterialize32BitInt()
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| D | PPCRegisterInfo.cpp | 836 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg) in eliminateFrameIndex()
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| D | PPCISelDAGToDAG.cpp | 3872 if (Op32.getMachineOpcode() == PPC::ORI || in PeepholePPC64ZExtGather()
4030 case PPC::ORI: NewOpcode = PPC::ORI8; break; in PeepholePPC64ZExt()
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| /external/icu/icu4c/source/common/ |
| D | ucnvisci.c | 92 ORI = 0x47, enumerator
145 { ORIYA, ORI_MASK, ORI },
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| /external/icu/icu4j/main/classes/charset/src/com/ibm/icu/charset/ |
| D | CharsetISCII.java | 84 static final short ORI = 0x47; field in CharsetISCII.ISCIILang
166 new LookupDataStruct(UniLang.ORIYA, MaskEnum.ORI_MASK, ISCIILang.ORI),
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