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Searched refs:UINT_TO_FP (Results 1 – 25 of 29) sorted by relevance

12

/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp106 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
109 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
111 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
113 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
115 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
117 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
119 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
121 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
123 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
125 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
[all …]
DARMISelLowering.cpp110 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in addTypeForNEON()
115 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON()
533 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering()
619 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering()
3839 case ISD::UINT_TO_FP: in LowerVectorINT_TO_FP()
3841 Opc = ISD::UINT_TO_FP; in LowerVectorINT_TO_FP()
6285 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG); in LowerOperation()
9331 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp195 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
196 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
197 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
203 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
204 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
205 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
210 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
211 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
217 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
218 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 }, in getCastInstrCost()
[all …]
DAArch64ISelLowering.cpp195 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in AArch64TargetLowering()
196 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering()
197 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering()
479 setTargetDAGCombine(ISD::UINT_TO_FP); in AArch64TargetLowering()
549 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand); in AArch64TargetLowering()
556 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote); in AArch64TargetLowering()
558 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Promote); in AArch64TargetLowering()
563 setOperationAction(ISD::UINT_TO_FP, MVT::v8i8, Promote); in AArch64TargetLowering()
565 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Promote); in AArch64TargetLowering()
568 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); in AArch64TargetLowering()
[all …]
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp469 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 2*10 }, in getCastInstrCost()
470 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v4i32, 4*10 }, in getCastInstrCost()
471 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v8i16, 8*10 }, in getCastInstrCost()
472 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 }, in getCastInstrCost()
478 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v2i64, 15 }, in getCastInstrCost()
479 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 8 }, in getCastInstrCost()
480 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v8i16, 15 }, in getCastInstrCost()
481 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost()
570 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 8 }, in getCastInstrCost()
613 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 }, in getCastInstrCost()
[all …]
DX86ISelLowering.cpp179 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); in X86TargetLowering()
180 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); in X86TargetLowering()
181 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); in X86TargetLowering()
184 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); in X86TargetLowering()
185 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in X86TargetLowering()
189 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in X86TargetLowering()
192 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom); in X86TargetLowering()
728 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in X86TargetLowering()
793 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Custom); in X86TargetLowering()
922 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Custom); in X86TargetLowering()
[all …]
/external/llvm/test/CodeGen/R600/
Ddagcombiner-bug-illegal-vec4-int-to-fp.ll7 ; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h385 UINT_TO_FP, enumerator
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp330 case ISD::UINT_TO_FP: in LegalizeOp()
371 case ISD::UINT_TO_FP: in Promote()
435 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND : in PromoteINT_TO_FP()
692 case ISD::UINT_TO_FP: in Expand()
DLegalizeVectorTypes.cpp98 case ISD::UINT_TO_FP: in ScalarizeVectorResult()
433 case ISD::UINT_TO_FP: in ScalarizeVectorOperand()
639 case ISD::UINT_TO_FP: in SplitVectorResult()
1318 case ISD::UINT_TO_FP: in SplitVectorOperand()
1790 case ISD::UINT_TO_FP: in WidenVectorResult()
2641 case ISD::UINT_TO_FP: in WidenVectorOperand()
DSelectionDAGDumper.cpp239 case ISD::UINT_TO_FP: return "uint_to_fp"; in getOperationName()
DLegalizeDAG.cpp1193 case ISD::UINT_TO_FP: in LegalizeOp()
2547 SDValue Fcvt = DAG.getNode(ISD::UINT_TO_FP, dl, MVT::f64, Trunc); in ExpandLegalINT_TO_FP()
2552 SDValue Fcvt2 = DAG.getNode(ISD::UINT_TO_FP, dl, MVT::f64, Lo); in ExpandLegalINT_TO_FP()
2631 if (TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, NewInTy)) { in PromoteLegalINT_TO_FP()
2632 OpToUse = ISD::UINT_TO_FP; in PromoteLegalINT_TO_FP()
3037 case ISD::UINT_TO_FP: in ExpandNode()
4031 if (Node->getOpcode() == ISD::UINT_TO_FP || in PromoteNode()
4083 case ISD::UINT_TO_FP: in PromoteNode()
DLegalizeFloatTypes.cpp104 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; in SoftenFloatResult()
915 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; in ExpandFloatResult()
1772 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break; in PromoteFloatResult()
DDAGCombiner.cpp1357 case ISD::UINT_TO_FP: return visitUINT_TO_FP(N); in visit()
7954 TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT)) { in visitSINT_TO_FP()
7957 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); in visitSINT_TO_FP()
8001 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); in visitUINT_TO_FP()
8005 if (!TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT) && in visitUINT_TO_FP()
8035 if (N0.getOpcode() != ISD::UINT_TO_FP && N0.getOpcode() != ISD::SINT_TO_FP) in FoldIntToFPToInt()
11283 (Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP)) { in reduceBuildVecConvertToConvertBuildVec()
11306 assert((Opcode == ISD::UINT_TO_FP || Opcode == ISD::SINT_TO_FP) in reduceBuildVecConvertToConvertBuildVec()
DLegalizeIntegerTypes.cpp863 case ISD::UINT_TO_FP: Res = PromoteIntOp_UINT_TO_FP(N); break; in PromoteIntegerOperand()
2527 case ISD::UINT_TO_FP: Res = ExpandIntOp_UINT_TO_FP(N); break; in ExpandIntegerOperand()
/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp298 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AMDGPUTargetLowering()
329 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in AMDGPUTargetLowering()
619 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG); in LowerOperation()
1550 ISD::NodeType ToFp = sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP; in LowerDIVREM24()
2153 SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, in LowerINT_TO_FP64()
2156 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64()
2181 SDValue FloatLo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, Lo); in LowerUINT_TO_FP()
2184 SDValue FloatHi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, Hi); in LowerUINT_TO_FP()
DSIISelLowering.cpp218 setTargetDAGCombine(ISD::UINT_TO_FP); in SITargetLowering()
1651 case ISD::UINT_TO_FP: { in PerformDAGCombine()
DR600ISelLowering.cpp1844 if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) { in PerformDAGCombine()
1845 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), N->getValueType(0), in PerformDAGCombine()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1453 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering()
1458 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering()
1463 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
1468 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); in HexagonTargetLowering()
1473 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Legal); in HexagonTargetLowering()
1488 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in HexagonTargetLowering()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp108 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in PPCTargetLowering()
109 AddPromotedToType (ISD::UINT_TO_FP, MVT::i1, in PPCTargetLowering()
113 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom); in PPCTargetLowering()
257 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in PPCTargetLowering()
357 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in PPCTargetLowering()
375 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in PPCTargetLowering()
381 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in PPCTargetLowering()
500 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); in PPCTargetLowering()
609 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal); in PPCTargetLowering()
747 setOperationAction(ISD::UINT_TO_FP, MVT::v4i1, Custom); in PPCTargetLowering()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
DR600ISelLowering.cpp412 ConversionOp = ISD::UINT_TO_FP; in LowerSELECT_CC()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1428 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering()
1430 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in SparcTargetLowering()
2802 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG, *this, in LowerOperation()
3206 case ISD::UINT_TO_FP: in ReplaceNodeResults()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1558 case UIToFP: return ISD::UINT_TO_FP; in InstructionOpcodeToISD()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp282 setOperationAction(ISD::UINT_TO_FP, Ty, Legal); in addMSAIntType()
1829 return DAG.getNode(ISD::UINT_TO_FP, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp210 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); in SystemZTargetLowering()
211 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in SystemZTargetLowering()

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