| /external/llvm/lib/Target/R600/ |
| D | SIFoldOperands.cpp | 54 MachineInstr *UseMI; member
60 UseMI(MI), UseOpNo(OpNo) { in FoldCandidate()
108 MachineInstr *MI = Fold.UseMI; in updateOperand()
203 MachineInstr *UseMI = Use->getParent(); in runOnMachineFunction() local
204 const MachineOperand &UseOp = UseMI->getOperand(Use.getOperandNo()); in runOnMachineFunction()
238 if (UseMI->getOpcode() == AMDGPU::COPY) { in runOnMachineFunction()
239 unsigned DestReg = UseMI->getOperand(0).getReg(); in runOnMachineFunction()
249 UseMI->setDesc(TII->get(MovOp)); in runOnMachineFunction()
253 const MCInstrDesc &UseDesc = UseMI->getDesc(); in runOnMachineFunction()
263 tryAddToFoldList(FoldList, UseMI, Use.getOperandNo(), &ImmOp, TII); in runOnMachineFunction()
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| D | SIInstrInfo.cpp | 903 bool SIInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
908 unsigned Opc = UseMI->getOpcode(); in FoldImmediate()
912 if (hasModifiersSet(*UseMI, AMDGPU::OpName::src0_modifiers) || in FoldImmediate()
913 hasModifiersSet(*UseMI, AMDGPU::OpName::src1_modifiers) || in FoldImmediate()
914 hasModifiersSet(*UseMI, AMDGPU::OpName::src2_modifiers)) { in FoldImmediate()
918 MachineOperand *Src0 = getNamedOperand(*UseMI, AMDGPU::OpName::src0); in FoldImmediate()
919 MachineOperand *Src1 = getNamedOperand(*UseMI, AMDGPU::OpName::src1); in FoldImmediate()
920 MachineOperand *Src2 = getNamedOperand(*UseMI, AMDGPU::OpName::src2); in FoldImmediate()
948 UseMI->RemoveOperand(AMDGPU::getNamedOperandIdx(AMDGPU::V_MAD_F32, in FoldImmediate()
950 UseMI->RemoveOperand(AMDGPU::getNamedOperandIdx(AMDGPU::V_MAD_F32, in FoldImmediate()
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| /external/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 166 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
178 if (UseMI && UseMI != MI) in foldAsLoad()
183 UseMI = MI; in foldAsLoad()
186 if (!DefMI || !UseMI) in foldAsLoad()
193 LIS.getInstructionIndex(UseMI))) in foldAsLoad()
203 << " into single use: " << *UseMI); in foldAsLoad()
206 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) in foldAsLoad()
209 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI); in foldAsLoad()
213 LIS.ReplaceMachineInstrInMaps(UseMI, FoldMI); in foldAsLoad()
214 UseMI->eraseFromParent(); in foldAsLoad()
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| D | MachineTraceMetrics.cpp | 630 static bool getDataDeps(const MachineInstr *UseMI, in getDataDeps() argument
634 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { in getDataDeps()
654 static void getPHIDeps(const MachineInstr *UseMI, in getPHIDeps() argument
661 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
662 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) { in getPHIDeps()
663 if (UseMI->getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
664 unsigned Reg = UseMI->getOperand(i).getReg(); in getPHIDeps()
690 static void updatePhysDepsDownwards(const MachineInstr *UseMI, in updatePhysDepsDownwards() argument
697 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { in updatePhysDepsDownwards()
732 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI); in updatePhysDepsDownwards()
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| D | RegisterScavenging.cpp | 295 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
353 UseMI = RestorePointMI; in findSurvivorReg()
390 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
391 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
416 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) { in scavengeRegister()
428 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex, in scavengeRegister()
430 II = std::prev(UseMI); in scavengeRegister()
436 Scavenged[SI].Restore = std::prev(UseMI); in scavengeRegister()
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| D | TargetSchedule.cpp | 156 const MachineInstr *UseMI, unsigned UseOperIdx) const { in computeOperandLatency() argument
163 if (UseMI) { in computeOperandLatency()
165 UseMI, UseOperIdx); in computeOperandLatency()
195 if (!UseMI) in computeOperandLatency()
199 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
202 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency()
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| D | OptimizePHIs.cpp | 147 for (MachineInstr &UseMI : MRI->use_instructions(DstReg)) { in IsDeadPHICycle()
148 if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle)) in IsDeadPHICycle()
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| D | RegisterCoalescer.cpp | 679 MachineInstr *UseMI = MO.getParent(); in removeCopyByCommutingDef() local
680 unsigned OpNo = &MO - &UseMI->getOperand(0); in removeCopyByCommutingDef()
681 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI); in removeCopyByCommutingDef()
686 if (UseMI->isRegTiedToDefOperand(OpNo)) in removeCopyByCommutingDef()
727 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef() local
728 if (UseMI->isDebugValue()) { in removeCopyByCommutingDef()
734 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true); in removeCopyByCommutingDef()
745 if (UseMI == CopyMI) in removeCopyByCommutingDef()
747 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
749 if (UseMI->getOperand(0).getReg() != IntB.reg || in removeCopyByCommutingDef()
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| D | MachineLICM.cpp | 1021 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in HasLoopPHIUse()
1023 if (UseMI.isPHI()) { in HasLoopPHIUse()
1026 if (CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1031 if (isExitBlock(UseMI.getParent())) in HasLoopPHIUse()
1036 if (UseMI.isCopy() && CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1037 Work.push_back(&UseMI); in HasLoopPHIUse()
1052 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in HasHighOperandLatency()
1053 if (UseMI.isCopyLike()) in HasHighOperandLatency()
1055 if (!CurLoop->contains(UseMI.getParent())) in HasHighOperandLatency()
1057 for (unsigned i = 0, e = UseMI.getNumOperands(); i != e; ++i) { in HasHighOperandLatency()
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| D | PeepholeOptimizer.cpp | 359 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() local
360 if (UseMI == MI) in INITIALIZE_PASS_DEPENDENCY()
363 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
389 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
392 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
395 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
432 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
433 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
444 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
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| D | MachineSSAUpdater.cpp | 223 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
225 if (UseMI->isPHI()) { in RewriteUse()
226 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
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| D | TailDuplication.cpp | 271 MachineInstr *UseMI = UseMO.getParent(); in TailDuplicateAndUpdate() local
273 if (UseMI->isDebugValue()) { in TailDuplicateAndUpdate()
278 UseMI->eraseFromParent(); in TailDuplicateAndUpdate()
281 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in TailDuplicateAndUpdate()
346 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in isDefLiveOut()
347 if (UseMI.isDebugValue()) in isDefLiveOut()
349 if (UseMI.getParent() != BB) in isDefLiveOut()
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| D | MachineRegisterInfo.cpp | 439 MachineInstr *UseMI = &*I; in markUsesInDebugValueAsUndef() local
440 if (UseMI->isDebugValue()) in markUsesInDebugValueAsUndef()
441 UseMI->getOperand(0).setReg(0U); in markUsesInDebugValueAsUndef()
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| D | TwoAddressInstructionPass.cpp | 502 MachineInstr &UseMI = *MRI->use_instr_nodbg_begin(Reg); in findOnlyInterestingUse() local
503 if (UseMI.getParent() != MBB) in findOnlyInterestingUse()
507 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) { in findOnlyInterestingUse()
509 return &UseMI; in findOnlyInterestingUse()
512 if (isTwoAddrUse(UseMI, Reg, DstReg)) { in findOnlyInterestingUse()
514 return &UseMI; in findOnlyInterestingUse()
742 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy, in scanUses() local
744 if (IsCopy && !Processed.insert(UseMI).second) in scanUses()
747 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI); in scanUses()
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| /external/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 124 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg() local
125 if (UseMI->getParent() != MBB) in getDefReg()
128 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
129 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
133 UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg()
134 if (UseMI->getParent() != MBB) in getDefReg()
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| D | ThumbRegisterInfo.cpp | 447 MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, in saveScavengerRegister() argument
452 return ARMBaseRegisterInfo::saveScavengerRegister(MBB, I, UseMI, RC, Reg); in saveScavengerRegister()
469 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) { in saveScavengerRegister()
476 UseMI = II; in saveScavengerRegister()
484 UseMI = II; in saveScavengerRegister()
491 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)). in saveScavengerRegister()
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| D | ARMBaseInstrInfo.cpp | 2606 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr *UseMI, in FoldImmediate() argument
2630 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
2633 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR) in FoldImmediate()
2639 unsigned UseOpc = UseMI->getOpcode(); in FoldImmediate()
2654 Commute = UseMI->getOperand(2).getReg() != Reg; in FoldImmediate()
2706 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); in FoldImmediate()
2707 bool isKill = UseMI->getOperand(OpIdx).isKill(); in FoldImmediate()
2709 AddDefaultCC(AddDefaultPred(BuildMI(*UseMI->getParent(), in FoldImmediate()
2710 UseMI, UseMI->getDebugLoc(), in FoldImmediate()
2714 UseMI->setDesc(get(NewUseOpc)); in FoldImmediate()
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| D | ThumbRegisterInfo.h | 56 MachineBasicBlock::iterator &UseMI,
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| D | ARMBaseInstrInfo.h | 270 bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
278 const MachineInstr *UseMI,
334 const MachineInstr *UseMI,
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 108 const MachineInstr *UseMI, in getOperandLatency() argument
111 UseMI, UseIdx); in getOperandLatency()
127 if (UseMI->isBranch() && IsRegCR) { in getOperandLatency()
1091 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
1107 const MCInstrDesc &UseMCID = UseMI->getDesc(); in FoldImmediate()
1114 for (UseIdx = 0; UseIdx < UseMI->getNumOperands(); ++UseIdx) in FoldImmediate()
1115 if (UseMI->getOperand(UseIdx).isReg() && in FoldImmediate()
1116 UseMI->getOperand(UseIdx).getReg() == Reg) in FoldImmediate()
1119 assert(UseIdx < UseMI->getNumOperands() && "Cannot find Reg in UseMI"); in FoldImmediate()
1151 UseMI->getOperand(UseIdx).setReg(ZeroReg); in FoldImmediate()
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| D | PPCInstrInfo.h | 100 const MachineInstr *UseMI,
178 bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
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| D | PPCVSXFMAMutate.cpp | 241 MachineInstr *UseMI = UseMO.getParent(); in processBlock() local
245 if (UseMI == AddendMI) in processBlock()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16RegisterInfo.cpp | 63 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
69 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); in saveScavengerRegister()
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| D | Mips16RegisterInfo.h | 34 MachineBasicBlock::iterator &UseMI,
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1004 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate() argument
1038 const MachineInstr *UseMI,
1045 const MachineInstr *UseMI, unsigned UseIdx)
1080 const MachineInstr *UseMI, unsigned UseIdx) const { in hasHighOperandLatency() argument
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