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Searched refs:Op0IsKill (Results 1 – 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DFastISel.h342 bool Op0IsKill);
347 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
353 bool Op0IsKill, uint64_t Imm);
359 bool Op0IsKill, const ConstantFP *FPImm);
365 unsigned Op0, bool Op0IsKill, unsigned Op1,
373 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
395 bool Op0IsKill);
401 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
407 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
414 bool Op0IsKill, uint64_t Imm);
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/external/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp425 bool Op0IsKill = hasTrivialKill(I->getOperand(0)); in selectBinaryOp() local
446 Op0IsKill, Imm, VT.getSimpleVT()); in selectBinaryOp()
458 ISDOpcode, Op0, Op0IsKill, CF); in selectBinaryOp()
473 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
1299 bool Op0IsKill = hasTrivialKill(I->getOperand(0)); in selectBitCast() local
1316 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1720 bool Op0IsKill, uint64_t Imm, MVT ImmType) { in fastEmit_ri_() argument
1738 unsigned ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm); in fastEmit_ri_()
1759 return fastEmit_rr(VT, VT, Opcode, Op0, Op0IsKill, MaterialReg, IsImmKill); in fastEmit_ri_()
1794 bool Op0IsKill) { in fastEmitInst_r() argument
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/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp194 unsigned emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, int64_t Imm);
212 unsigned emitMul_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
214 unsigned emitSMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
216 unsigned emitUMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
218 unsigned emitLSL_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill,
220 unsigned emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
222 unsigned emitLSR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill,
224 unsigned emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
226 unsigned emitASR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill,
228 unsigned emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
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/external/llvm/lib/Target/ARM/
DARMFastISel.cpp108 unsigned Op0, bool Op0IsKill);
111 unsigned Op0, bool Op0IsKill,
115 unsigned Op0, bool Op0IsKill,
120 unsigned Op0, bool Op0IsKill,
124 unsigned Op0, bool Op0IsKill,
286 unsigned Op0, bool Op0IsKill) { in fastEmitInst_r() argument
295 ResultReg).addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
298 .addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
308 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
321 .addReg(Op0, Op0IsKill * RegState::Kill) in fastEmitInst_rr()
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/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp116 unsigned Op0, bool Op0IsKill,
120 unsigned Op0, bool Op0IsKill);
123 unsigned Op0, bool Op0IsKill,
2294 unsigned Op0, bool Op0IsKill, in fastEmitInst_ri() argument
2306 Op0, Op0IsKill, Imm); in fastEmitInst_ri()
2314 unsigned Op0, bool Op0IsKill) { in fastEmitInst_r() argument
2319 return FastISel::fastEmitInst_r(MachineInstOpcode, UseRC, Op0, Op0IsKill); in fastEmitInst_r()
2327 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
2333 return FastISel::fastEmitInst_rr(MachineInstOpcode, UseRC, Op0, Op0IsKill, in fastEmitInst_rr()
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp167 unsigned Op0, bool Op0IsKill,
174 unsigned Op0, bool Op0IsKill, uint64_t imm1, in fastEmitInst_riir() argument
1855 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
1869 .addReg(Op0, getKillRegState(Op0IsKill)) in fastEmitInst_rr()
1876 return FastISel::fastEmitInst_rr(MachineInstOpcode, RC, Op0, Op0IsKill, Op1, in fastEmitInst_rr()