| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_64.c | 53 #define RN(rn) (reg_map[rn] << 5) macro
432 return push_inst(compiler, (ORRI ^ W_OP) | RD(dst) | RN(TMP_ZERO) | bitmask); in load_immediate()
437 return push_inst(compiler, ORRI | RD(dst) | RN(TMP_ZERO) | bitmask); in load_immediate()
565 return push_inst(compiler, ((op == SLJIT_ADD ? ADDI : SUBI) ^ inv_bits) | RD(dst) | RN(reg)); in emit_op_imm()
569 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | (imm << 10)); in emit_op_imm()
574 return push_inst(compiler, (SUBI ^ inv_bits) | RD(dst) | RN(reg) | (nimm << 10)); in emit_op_imm()
578 …return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | ((imm >> 12) << 10) | (1 << 22)… in emit_op_imm()
582 …return push_inst(compiler, (SUBI ^ inv_bits) | RD(dst) | RN(reg) | ((nimm >> 12) << 10) | (1 << 22… in emit_op_imm()
585 …FAIL_IF(push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | ((imm >> 12) << 10) | (1 << 22… in emit_op_imm()
586 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(dst) | ((imm & 0xfff) << 10)); in emit_op_imm()
[all …]
|
| /external/v8/test/cctest/ |
| D | test-assembler-ppc.cc | 534 TestRoundingMode(s32_f64, RN, 0, 0);
535 TestRoundingMode(s32_f64, RN, 0.5, 0);
536 TestRoundingMode(s32_f64, RN, -0.5, 0);
537 TestRoundingMode(s32_f64, RN, 1.5, 2);
538 TestRoundingMode(s32_f64, RN, -1.5, -2);
539 TestRoundingMode(s32_f64, RN, 123.7, 124);
540 TestRoundingMode(s32_f64, RN, -123.7, -124);
541 TestRoundingMode(s32_f64, RN, 123456.2, 123456);
542 TestRoundingMode(s32_f64, RN, -123456.2, -123456);
543 TestRoundingMode(s32_f64, RN, static_cast<double>(kMaxInt), kMaxInt);
[all …]
|
| D | test-assembler-arm.cc | 511 TestRoundingMode(s32_f64, RN, 0, 0);
512 TestRoundingMode(s32_f64, RN, 0.5, 0);
513 TestRoundingMode(s32_f64, RN, -0.5, 0);
514 TestRoundingMode(s32_f64, RN, 1.5, 2);
515 TestRoundingMode(s32_f64, RN, -1.5, -2);
516 TestRoundingMode(s32_f64, RN, 123.7, 124);
517 TestRoundingMode(s32_f64, RN, -123.7, -124);
518 TestRoundingMode(s32_f64, RN, 123456.2, 123456);
519 TestRoundingMode(s32_f64, RN, -123456.2, -123456);
520 TestRoundingMode(s32_f64, RN, static_cast<double>(kMaxInt), kMaxInt);
[all …]
|
| /external/valgrind/none/tests/arm/ |
| D | vfp.c | 77 #define TESTINSN_vmov_core_single(instruction, RN, SD, SDval) \ argument
83 "mov " #RN ", #0\n\t" \
86 "str " #RN ", [%0]\n\t" \
89 : #SD, #RN, "memory" \
91 printf("%s :: "#RN" 0x%08x\n", \
95 #define TESTINSN_vmov_single_core(instruction, SD, RN, RNval) \ argument
99 printf(#RN" 0x%08x\t", RNval); \
101 "mov " #RN ", %1\n\t" \
107 : #SD, #RN, "memory" \
134 #define TESTINSN_vmov_2single_2core(instruction, SD1, SD2, RN, RM, RNval, RMval) \ argument
[all …]
|
| D | v6intARM.c | 41 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
51 "mov " #RN ",%3;" \
57 : #RD, #RM, #RN, "cc", "memory" \
70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
80 "mov " #RN ",%3;" \
87 : #RD, #RM, #RN, #RS, "cc", "memory" \
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegionInfo.h | 60 bool operator==(const MachineRegion &RN) const {
61 return this == reinterpret_cast<const MachineRegionNode*>(&RN);
72 bool operator==(const MachineRegionNode &RN) const {
73 return &RN == reinterpret_cast<const MachineRegionNode*>(this);
|
| /external/llvm/lib/Analysis/ |
| D | ScalarEvolutionNormalization.cpp | 217 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace); in TransformImpl() local
218 if (LO != LN || RO != RN) in TransformImpl()
219 return SE.getUDivExpr(LN, RN); in TransformImpl()
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.h | 665 Record *getResult(unsigned RN) const { in getResult() argument
666 assert(RN < Results.size()); in getResult()
667 return Results[RN]; in getResult()
675 Record *getImpResult(unsigned RN) const { in getImpResult() argument
676 assert(RN < ImpResults.size()); in getImpResult()
677 return ImpResults[RN]; in getImpResult()
|
| /external/eigen/Eigen/src/SparseLU/ |
| D | SparseLU_gemm_kernel.h | 35 RN = 2, // register blocking in sparselu_gemm() enumerator
41 Index n_end = (n/RN)*RN; // number of columns of B-C suitable for processing RN columns at once in sparselu_gemm()
65 for(Index j=0; j<n_end; j+=RN) in sparselu_gemm()
|
| /external/valgrind/none/tests/arm64/ |
| D | memory.c | 45 #define TESTINST2_hide2(instruction, RNval, RD, RN, carryin) \ argument
52 "mov " #RN ",%2;" \
58 : #RD, #RN, "cc", "memory", "x28" \
72 #define TESTINST3_hide2and3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
80 "mov " #RN ",%3;" \
86 : #RD, #RM, #RN, "cc", "memory" \
|
| /external/llvm/include/llvm/Analysis/ |
| D | RegionInfo.h | 821 bool operator==(const Region &RN) const {
822 return this == reinterpret_cast<const RegionNode *>(&RN);
832 bool operator==(const RegionNode &RN) const {
833 return &RN == reinterpret_cast<const RegionNode *>(this);
|
| /external/llvm/lib/Transforms/Utils/ |
| D | CodeExtractor.cpp | 112 buildExtractionBlockSet(const RegionNode &RN) { in buildExtractionBlockSet() argument
113 if (!RN.isSubRegion()) in buildExtractionBlockSet()
115 return buildExtractionBlockSet(RN.getNodeAs<BasicBlock>()); in buildExtractionBlockSet()
117 const Region &R = *RN.getNodeAs<Region>(); in buildExtractionBlockSet()
135 CodeExtractor::CodeExtractor(DominatorTree &DT, const RegionNode &RN, in CodeExtractor() argument
138 Blocks(buildExtractionBlockSet(RN)), NumExitBlocks(~0U) {} in CodeExtractor()
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 45 std::string RN(RegName); in printRegName() local
47 RN[0] = 'f'; in printRegName()
48 OS << RN; in printRegName()
|
| /external/llvm/include/llvm/Transforms/Utils/ |
| D | CodeExtractor.h | 82 CodeExtractor(DominatorTree &DT, const RegionNode &RN,
|
| /external/v8/src/ppc/ |
| D | constants-ppc.h | 435 RN = 0, // Round to Nearest. enumerator
441 kRoundToNearest = RN,
|
| /external/clang/lib/AST/ |
| D | DeclarationName.cpp | 99 unsigned LN = LHSSelector.getNumArgs(), RN = RHSSelector.getNumArgs(); in compare() local
100 for (unsigned I = 0, N = std::min(LN, RN); I != N; ++I) { in compare()
109 return compareInt(LN, RN); in compare()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTX.h | 129 RN, enumerator
|
| /external/v8/src/arm/ |
| D | constants-arm.h | 389 RN = 0 << 22, // Round to Nearest. enumerator
395 kRoundToNearest = RN,
|
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| D | simpleloopfilter_v6.asm | 49 src RN r0
50 pstep RN r1
|
| /external/v8/src/mips/ |
| D | constants-mips.h | 773 RN = 0 << 0, // Round to Nearest. enumerator
779 kRoundToNearest = RN,
784 mode_round = RN,
|
| /external/llvm/include/llvm/Support/ |
| D | GenericDomTree.h | 400 const DomTreeNodeBase<NodeT> *RN = getNode(R); in getDescendants() local
401 if (!RN) in getDescendants()
404 WL.push_back(RN); in getDescendants()
|
| /external/v8/src/mips64/ |
| D | constants-mips64.h | 819 RN = 0 << 0, // Round to Nearest. enumerator
825 kRoundToNearest = RN,
830 mode_round = RN,
|
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| D | NVPTXInstPrinter.cpp | 124 case NVPTX::PTXCvtMode::RN: in printCvtMode()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 170 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR,
940 void HexagonExpandCondsets::renameInRange(RegisterRef RO, RegisterRef RN, in renameInRange() argument
956 Op.setReg(RN.Reg); in renameInRange()
957 Op.setSubReg(RN.Sub); in renameInRange()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 627 if (unsigned RN = Value.getResNo()) in printOperand() local
628 OS << ':' << RN; in printOperand()
|