Searched refs:SparcInstrInfo (Results 1 – 11 of 11) sorted by relevance
| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 33 void SparcInstrInfo::anchor() {} in anchor()
35 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) in SparcInstrInfo() function in SparcInstrInfo
44 unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
65 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot()
127 bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, in AnalyzeBranch()
230 SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, in InsertBranch()
258 unsigned SparcInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const in RemoveBranch()
280 void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
369 void SparcInstrInfo::
408 void SparcInstrInfo::
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| D | SparcFrameLowering.cpp | 48 const SparcInstrInfo &TII = in emitSPAdjustment()
49 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitSPAdjustment()
91 const SparcInstrInfo &TII = in emitPrologue()
92 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitPrologue()
206 const SparcInstrInfo &TII = in emitEpilogue()
207 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitEpilogue()
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| D | Sparc.td | 52 include "SparcInstrInfo.td"
54 def SparcInstrInfo : InstrInfo;
103 let InstructionSet = SparcInstrInfo;
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| D | SparcSubtarget.h | 40 SparcInstrInfo InstrInfo;
49 const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| D | SparcInstrInfo.h | 39 class SparcInstrInfo : public SparcGenInstrInfo {
44 explicit SparcInstrInfo(SparcSubtarget &ST);
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| D | CMakeLists.txt | 17 SparcInstrInfo.cpp
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| D | SparcInstrAliases.td | 297 // Note: cmp is handled in SparcInstrInfo.
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| D | SparcInstr64Bit.td | 13 // Some SPARC v9 instructions are defined in SparcInstrInfo.td because they can
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| D | SparcInstrInfo.td | 1 //===-- SparcInstrInfo.td - Target Description for Sparc Target -----------===//
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| /external/llvm/test/CodeGen/Generic/ |
| D | 2002-04-14-UnexpectedUnsignedType.ll | 4 ; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"'
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 205 SparcInstrInfo InstrInfo;
214 virtual const SparcInstrInfo *getInstrInfo() const {return &InstrInfo; }
752 floating-point operations. ``SparcInstrInfo.td`` also adds the base class
755 ``SparcInstrInfo.td`` largely consists of operand and instruction definitions
756 for the SPARC target. In ``SparcInstrInfo.td``, the following target
772 ``MEMrr`` that is defined earlier in ``SparcInstrInfo.td``:
802 ``defm`` directive). For example in ``SparcInstrInfo.td``, the ``multiclass``
828 ``SparcInstrInfo.td`` also includes definitions for condition codes that are
830 ``SparcInstrInfo.td`` indicate the bit location of the SPARC condition code.
848 correspond to the values in ``SparcInstrInfo.td``. I.e., ``SPCC::ICC_NE = 9``,
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