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/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/D6D1FEC9A15DE7F38A236898871A2E770/
Dbreakpad_unittests.sym58084 STACK CFI INIT 2351c 4 .cfa: sp 0 + .ra: x30
58085 STACK CFI INIT 23520 4 .cfa: sp 0 + .ra: x30
58086 STACK CFI INIT 23524 8 .cfa: sp 0 + .ra: x30
58087 STACK CFI INIT 2352c 8 .cfa: sp 0 + .ra: x30
58088 STACK CFI INIT 23534 8 .cfa: sp 0 + .ra: x30
58089 STACK CFI INIT 2353c 8 .cfa: sp 0 + .ra: x30
58090 STACK CFI INIT 23544 8 .cfa: sp 0 + .ra: x30
58091 STACK CFI INIT 2354c 8 .cfa: sp 0 + .ra: x30
58092 STACK CFI INIT 23554 4 .cfa: sp 0 + .ra: x30
58093 STACK CFI INIT 23558 8 .cfa: sp 0 + .ra: x30
[all …]
/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/DA7778FB66018A4E9B4110ED06E730D00/
Dbreakpad_unittests.sym55150 STACK CFI INIT 15dc4 2 .cfa: sp 0 + .ra: lr
55151 STACK CFI INIT 15dc6 2 .cfa: sp 0 + .ra: lr
55152 STACK CFI INIT 15dc8 4 .cfa: sp 0 + .ra: lr
55153 STACK CFI INIT 15dcc 4 .cfa: sp 0 + .ra: lr
55154 STACK CFI INIT 15dd0 4 .cfa: sp 0 + .ra: lr
55155 STACK CFI INIT 15dd4 4 .cfa: sp 0 + .ra: lr
55156 STACK CFI INIT 15dd8 4 .cfa: sp 0 + .ra: lr
55157 STACK CFI INIT 15ddc 6 .cfa: sp 0 + .ra: lr
55158 STACK CFI INIT 15de2 2 .cfa: sp 0 + .ra: lr
55159 STACK CFI INIT 15dc8 4 .cfa: sp 0 + .ra: lr
[all …]
/external/google-breakpad/src/processor/testdata/symbols/libc-2.13.so/F4F8DFCD5A5FB5A7CE64717E9E6AE3890/
Dlibc-2.13.so.sym1712 STACK CFI INIT 1eaf0 90 .cfa: $rsp 16 + .ra: .cfa -8 + ^
1714 STACK CFI INIT 1eb80 2 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1715 STACK CFI INIT 1eb90 9 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1717 STACK CFI INIT 1eba0 210 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1721 STACK CFI INIT 1edb0 1c7 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1725 STACK CFI INIT 1ef80 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1726 STACK CFI INIT 1ef90 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1727 STACK CFI INIT 1efa0 16 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1728 STACK CFI INIT 1efc0 10 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1730 STACK CFI INIT 1efd0 c3 .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/valgrind/VEX/priv/
Dguest_tilegx_toIR.c294 ULong cins, opcode = -1, rd, ra, rb, imm = 0; in disInstr_TILEGX_WRK() local
425 rd = ra = rb = -1; in disInstr_TILEGX_WRK()
440 else if (ra == -1) in disInstr_TILEGX_WRK()
441 ra = decoded[n].operand_values[opi]; in disInstr_TILEGX_WRK()
443 if (ra == -1) { in disInstr_TILEGX_WRK()
444 ra = decoded[n].operand_values[opi]; in disInstr_TILEGX_WRK()
487 assign(t2, getIReg(ra)); in disInstr_TILEGX_WRK()
536 assign(t2, binop(Iop_Add64, getIReg(ra), getIReg(rb))); in disInstr_TILEGX_WRK()
541 assign(t2, binop(Iop_Add64, getIReg(ra), in disInstr_TILEGX_WRK()
547 assign(t2, binop(Iop_Add64, getIReg(ra), in disInstr_TILEGX_WRK()
[all …]
/external/google-breakpad/src/processor/testdata/symbols/ld-2.13.so/C32AD7E235EA6112E02A5B9D6219C4850/
Dld-2.13.so.sym17 STACK CFI INIT b40 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
18 STACK CFI INIT b50 5 .cfa: $rsp 8 + .ra: .cfa -8 + ^
19 STACK CFI INIT b60 5 .cfa: $rsp 8 + .ra: .cfa -8 + ^
20 STACK CFI INIT b70 69 .cfa: $rsp 8 + .ra: .cfa -8 + ^
24 STACK CFI INIT be0 49 .cfa: $rsp 8 + .ra: .cfa -8 + ^
28 STACK CFI INIT c30 4ed .cfa: $rsp 8 + .ra: .cfa -8 + ^
37 STACK CFI INIT 1120 600 .cfa: $rsp 8 + .ra: .cfa -8 + ^
41 STACK CFI INIT 1720 9b .cfa: $rsp 8 + .ra: .cfa -8 + ^
45 STACK CFI INIT 17c0 33 .cfa: $rsp 8 + .ra: .cfa -8 + ^
46 STACK CFI INIT 1800 31 .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s30 # CHECK-EL: lwm32 $16, $17, $18, $19, $ra, 8($4) # encoding: [0x84,0x22,0…
31 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
32 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
35 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
36 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
37 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
38 # CHECK-EL: lwm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0x50]
39 # CHECK-EL: lwm32 $16, $17, $ra, 8($4) # encoding: [0x44,0x22,0x08,0x50]
41 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
42 # CHECK-EL: swm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0xd0]
[all …]
Delf-tls.s24 .frame $sp,24,$ra
34 sw $ra, 20($sp) # 4-byte Folded Spill
40 lw $ra, 20($sp) # 4-byte Folded Reload
41 jr $ra
56 .frame $sp,24,$ra
66 sw $ra, 20($sp) # 4-byte Folded Spill
72 lw $ra, 20($sp) # 4-byte Folded Reload
73 jr $ra
88 .frame $sp,24,$ra
98 sw $ra, 20($sp) # 4-byte Folded Spill
[all …]
Ddo_switch1.s19 .frame $sp,8,$ra
35 jr $ra
46 jr $ra
50 jr $ra
54 jr $ra
58 jr $ra
Ddo_switch2.s18 .frame $sp,8,$ra
36 jr $ra
48 jr $ra
52 jr $ra
56 jr $ra
60 jr $ra
/external/v8/src/ppc/
Dassembler-ppc.cc184 MemOperand::MemOperand(Register ra, Register rb) { in MemOperand() argument
185 ra_ = ra; in MemOperand()
585 void Assembler::d_form(Instr instr, Register rt, Register ra, in d_form() argument
600 emit(instr | rt.code() * B21 | ra.code() * B16 | (kImm16Mask & val)); in d_form()
604 void Assembler::x_form(Instr instr, Register ra, Register rs, Register rb, in x_form() argument
606 emit(instr | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | r); in x_form()
610 void Assembler::xo_form(Instr instr, Register rt, Register ra, Register rb, in xo_form() argument
612 emit(instr | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 | o | r); in xo_form()
616 void Assembler::md_form(Instr instr, Register ra, Register rs, int shift, in md_form() argument
623 emit(instr | rs.code() * B21 | ra.code() * B16 | sh0_4 * B11 | m0_4 * B6 | in md_form()
[all …]
Dsimulator-ppc.cc1686 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1691 set_register(ra, result); in ExecuteExt2_10bit()
1700 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1705 set_register(ra, result); in ExecuteExt2_10bit()
1714 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1719 set_register(ra, result); in ExecuteExt2_10bit()
1728 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1733 set_register(ra, result); in ExecuteExt2_10bit()
1741 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1746 set_register(ra, result); in ExecuteExt2_10bit()
[all …]
/external/google-breakpad/src/processor/testdata/symbols/libgcc_s.so.1/18B180F90887D8F8B5C35D185444AF4C0/
Dlibgcc_s.so.1.sym129 STACK CFI INIT 2bb0 2c0 .cfa: $rsp 16 + .ra: .cfa -8 + ^
131 STACK CFI INIT 2fe0 4b .cfa: $rsp 8 + .ra: .cfa -8 + ^
132 STACK CFI INIT 3030 29 .cfa: $rsp 8 + .ra: .cfa -8 + ^
133 STACK CFI INIT 3060 67 .cfa: $rsp 8 + .ra: .cfa -8 + ^
134 STACK CFI INIT 30d0 67 .cfa: $rsp 8 + .ra: .cfa -8 + ^
135 STACK CFI INIT 3140 6a .cfa: $rsp 8 + .ra: .cfa -8 + ^
136 STACK CFI INIT 31b0 32 .cfa: $rsp 8 + .ra: .cfa -8 + ^
137 STACK CFI INIT 31f0 32 .cfa: $rsp 8 + .ra: .cfa -8 + ^
138 STACK CFI INIT 3230 2 .cfa: $rsp 8 + .ra: .cfa -8 + ^
139 STACK CFI INIT 3240 1e .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dret.ll25 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
26 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
35 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
36 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
45 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
46 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
55 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
56 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
65 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
66 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
[all …]
/external/llvm/test/CodeGen/ARM/
Darm-eabi.ll1 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EA…
2 ; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-…
3 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=C…
4 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK…
5 ; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHE…
6 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pref…
7 ; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pr…
8 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --che…
9 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-p…
10 ; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check…
[all …]
/external/mesa3d/src/gallium/auxiliary/rtasm/
Drtasm_ppc.c454 unsigned ra:5; member
462 emit_x(struct ppc_function *p, uint op, uint vrs, uint ra, uint rb, uint op2, in emit_x() argument
468 inst.inst.ra = ra; in emit_x()
475 printf(format, vrs, ra, rb); in emit_x()
485 unsigned ra:5; member
491 emit_d(struct ppc_function *p, uint op, uint rt, uint ra, int si, in emit_d() argument
499 inst.inst.ra = ra; in emit_d()
505 printf(format, rt, si, ra); in emit_d()
507 printf(format, rt, ra, si); in emit_d()
550 unsigned ra:5; member
[all …]
Drtasm_ppc.h249 ppc_add(struct ppc_function *p, uint rt, uint ra, uint rb);
252 ppc_addi(struct ppc_function *p, uint rt, uint ra, int imm);
255 ppc_addis(struct ppc_function *p, uint rt, uint ra, int imm);
258 ppc_and(struct ppc_function *p, uint rt, uint ra, uint rb);
261 ppc_andi(struct ppc_function *p, uint rt, uint ra, int imm);
264 ppc_or(struct ppc_function *p, uint rt, uint ra, uint rb);
267 ppc_ori(struct ppc_function *p, uint rt, uint ra, int imm);
270 ppc_xor(struct ppc_function *p, uint rt, uint ra, uint rb);
273 ppc_xori(struct ppc_function *p, uint rt, uint ra, int imm);
276 ppc_mr(struct ppc_function *p, uint rt, uint ra);
[all …]
/external/jemalloc/test/unit/
Dprng.c5 uint64_t sa, sb, ra, rb; in TEST_BEGIN() local
9 ra = prng_lg_range(&sa, 64); in TEST_BEGIN()
12 assert_u64_eq(ra, rb, in TEST_BEGIN()
17 assert_u64_eq(ra, rb, in TEST_BEGIN()
21 ra = prng_lg_range(&sa, 64); in TEST_BEGIN()
23 assert_u64_ne(ra, rb, in TEST_BEGIN()
27 ra = prng_lg_range(&sa, 64); in TEST_BEGIN()
33 assert_u64_eq(rb, (ra >> (64 - lg_range)), in TEST_BEGIN()
/external/llvm/test/CodeGen/Mips/
Ds2rem.ll18 ; PIC: save $16, $17, $ra, [[FS:[0-9]+]]
19 ; STATIC: save $16, $ra, [[FS:[0-9]+]]
20 ; PIC: restore $16, $17, $ra, [[FS]]
21 ; STATIC: restore $16, $ra, [[FS]]
35 ; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
36 ; PIC: restore $16, $17, $ra, $18, [[FS]]
49 ; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
50 ; PIC: restore $16, $17, $ra, $18, [[FS]]
64 ; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
65 ; PIC: restore $16, $17, $ra, $18, [[FS]]
[all …]
Dlongbranch.ll40 ; CHECK: jr $ra
57 ; O32-NEXT: sw $ra, 0($sp)
62 ; O32-NEXT: addu $1, $ra, $1
63 ; O32-NEXT: lw $ra, 0($sp)
72 ; O32: jr $ra
84 ; N64-NEXT: sd $ra, 0($sp)
90 ; N64-NEXT: daddu $1, $ra, $1
91 ; N64-NEXT: ld $ra, 0($sp)
101 ; N64: jr $ra
114 ; MICROMIPS-NEXT: sw $ra, 0($sp)
[all …]
Docteon.ll7 ; OCTEON: jr $ra
10 ; MIPS64: jr $ra
20 ; OCTEON: jr $ra
23 ; MIPS64: jr $ra
32 ; OCTEON: jr $ra
37 ; MIPS64: jr $ra
47 ; OCTEON: jr $ra
53 ; MIPS64: jr $ra
63 ; OCTEON: jr $ra
68 ; MIPS64: jr $ra
[all …]
/external/icu/icu4c/source/data/zone/
Dsr_Latn.txt1018 ld{"Britanija letnje računanje vremena"}
1267 ld{"Akre letnje računanje vremena"}
1284 ld{"Zapadno-afričko letnje računanje vremena"}
1289 ld{"Aljaska, letnje računanje vremena"}
1294 ld{"Almati letnje računanje vremena"}
1299 ld{"Amazon letnje računanje vremena"}
1304 ld{"Severnoamerički Centralno letnje računanje vremena"}
1309 ld{"Severnoamerički Istočno letnje računanje vremena"}
1314 ld{"Severnoamerički Planinsko letnje računanje vremena"}
1319 ld{"Severnoamerički Pacifičko letnje računanje vremena"}
[all …]
Dbs.txt1257 ld{"Acre letnje računanje vremena"}
1274 ld{"Zapadnoafričko ljetno računanje vremena"}
1279 ld{"Aljaskansko ljetno računanje vremena"}
1284 ld{"Almatu letnje računanje vremena"}
1289 ld{"Amazonsko ljetno računanje vremena"}
1294 ld{"Ljetno računanje centralnog vremena (SAD)"}
1299 ld{"Ljetno računanje istočnog vremena (SAD)"}
1304 ld{"Ljetno računanje planinskog vremena (SAD)"}
1309 ld{"Ljetno računanje pacifičkog vremena (SAD)"}
1314 ld{"Anadir letnje računanje vremena"}
[all …]
/external/dhcpcd-6.8.2/
Dipv6nd.h44 struct ra { struct
45 TAILQ_ENTRY(ra) next;
63 TAILQ_HEAD(ra_head, ra); argument
98 void ipv6nd_freedrop_ra(struct ra *, int);
99 #define ipv6nd_free_ra(ra) ipv6nd_freedrop_ra((ra), 0) argument
100 #define ipv6nd_drop_ra(ra) ipv6nd_freedrop_ra((ra), 1) argument
/external/google-breakpad/src/tools/windows/dump_syms/testdata/
Ddump_syms_regtest64.sym4172 STACK CFI INIT 1010 6a .cfa: $rsp .ra: .cfa 8 - ^
4174 STACK CFI INIT 10d0 36 .cfa: $rsp .ra: .cfa 8 - ^
4176 STACK CFI INIT 1110 26 .cfa: $rsp .ra: .cfa 8 - ^
4178 STACK CFI INIT 1180 39 .cfa: $rsp .ra: .cfa 8 - ^
4180 STACK CFI INIT 11bc 180 .cfa: $rsp .ra: .cfa 8 - ^
4182 STACK CFI INIT 133c 2c .cfa: $rsp .ra: .cfa 8 - ^
4184 STACK CFI INIT 1368 12 .cfa: $rsp .ra: .cfa 8 - ^
4186 STACK CFI INIT 137c 3d .cfa: $rsp .ra: .cfa 8 - ^
4188 STACK CFI INIT 13d0 67 .cfa: $rsp .ra: .cfa 8 - ^
4190 STACK CFI INIT 1438 6c .cfa: $rsp .ra: .cfa 8 - ^
[all …]
/external/llvm/test/CodeGen/MIR/Mips/
Dmemory-operands.mir41 callee-saved-register: '%ra' }
44 liveins: %a0, %ra
46 Save16 %ra, 24, implicit-def %sp, implicit %sp
57 …JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit killed %t9, implicit %a0, implicit k…
59 %ra = Restore16 24, implicit-def %sp, implicit %sp
73 callee-saved-register: '%ra' }
80 liveins: %ra, %s2, %s0, %ra, %s2, %s0
82 SaveX16 %s0, %ra, %s2, 32, implicit-def %sp, implicit %sp
95 …JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit %v0, implicit killed %gp, implicit-d…
99 …JumpLinkReg16 killed %v1, csr_mips16rethelper, implicit-def %ra, implicit killed %t9, implicit %v0…
[all …]

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