| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| D | arch7em-bad.l | 2 [^:]*:8: Error: selected processor does not support Thumb mode `pkhbt r0,r0,r0'
4 [^:]*:10: Error: selected processor does not support Thumb mode `pkhbt r0,r9,r0'
6 [^:]*:12: Error: selected processor does not support Thumb mode `pkhbt r0,r0,r0,lsl#0x14'
8 [^:]*:14: Error: selected processor does not support Thumb mode `pkhtb r1,r2,r3'
10 [^:]*:18: Error: selected processor does not support Thumb mode `qadd r1,r2,r3'
12 [^:]*:20: Error: selected processor does not support Thumb mode `qadd8 r1,r2,r3'
14 [^:]*:22: Error: selected processor does not support Thumb mode `qaddsubx r1,r2,r3'
16 [^:]*:24: Error: selected processor does not support Thumb mode `qdsub r1,r2,r3'
18 [^:]*:26: Error: selected processor does not support Thumb mode `qsub16 r1,r2,r3'
20 [^:]*:28: Error: selected processor does not support Thumb mode `qsax r1,r2,r3'
[all …]
|
| D | addthumb2err.l | 2 [^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4'
4 [^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3'
6 [^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX'
8 [^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3'
10 [^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3'
12 [^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4'
14 [^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3'
16 [^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX'
18 [^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3'
20 [^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3'
|
| D | t16-bad.l | 122 [^:]*:106: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,#4\]!'
124 [^:]*:106: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,-r2\]'
130 [^:]*:107: Error: Thumb does not support this addressing mode -- `ldrb r0,\[r1\],#4'
132 [^:]*:107: Error: Thumb does not support this addressing mode -- `ldrb r0,\[r1\],r2'
136 [^:]*:108: Error: Thumb does not support this addressing mode -- `ldrh r0,\[r1,#4\]!'
138 [^:]*:108: Error: Thumb does not support this addressing mode -- `ldrh r0,\[r1,-r2\]'
144 [^:]*:109: Error: Thumb does not support this addressing mode -- `ldrsb r0,\[r1\],#4'
146 [^:]*:109: Error: Thumb does not support this addressing mode -- `ldrsb r0,\[r1\],r2'
150 [^:]*:110: Error: Thumb does not support this addressing mode -- `ldrsh r0,\[r1,#4\]!'
152 [^:]*:110: Error: Thumb does not support this addressing mode -- `ldrsh r0,\[r1,-r2\]'
[all …]
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-h8300.c | 343 op_type mode; member
376 parse_reg (char *src, op_type *mode, unsigned int *reg, int direction) in parse_reg() argument
391 *mode = PSIZE | REG | direction; in parse_reg()
400 *mode = CCR; in parse_reg()
409 *mode = EXR; in parse_reg()
418 *mode = VBR; in parse_reg()
427 *mode = SBR; in parse_reg()
433 *mode = PSIZE | REG | direction; in parse_reg()
440 *mode = L_32 | REG | direction; in parse_reg()
448 *mode = L_16 | REG | direction; in parse_reg()
[all …]
|
| D | tc-z8k.c | 180 int mode; member
246 parse_reg (char *src, int *mode, unsigned int *preg) in parse_reg() argument
258 *mode = CLASS_REG_LONG; in parse_reg()
263 *mode = CLASS_REG_WORD; in parse_reg()
275 *mode = CLASS_REG_LONG; in parse_reg()
289 *mode = CLASS_REG_BYTE; in parse_reg()
301 *mode = CLASS_REG_BYTE; in parse_reg()
314 *mode = CLASS_REG_QUAD; in parse_reg()
328 *mode = CLASS_REG_WORD; in parse_reg()
383 regword (int mode, char *string) in regword() argument
[all …]
|
| D | m68k-parse.y | 144 op->mode = LSH;
149 op->mode = RSH;
154 op->mode = DREG;
159 op->mode = AREG;
164 op->mode = FPREG;
169 op->mode = CONTROL;
174 op->mode = CONTROL;
179 op->mode = ABSL;
184 op->mode = IMMED;
189 op->mode = IMMED;
[all …]
|
| D | tc-m68hc11.c | 149 int mode; member
1151 int mode; in get_operand() local
1157 mode = M6811_OP_NONE; in get_operand()
1169 mode = M6811_OP_DIRECT; in get_operand()
1181 mode = M6811_OP_IMM16; in get_operand()
1186 mode |= M6811_OP_HIGH_ADDR; in get_operand()
1191 mode |= M6811_OP_LOW_ADDR; in get_operand()
1198 mode |= M6811_OP_PAGE_ADDR; in get_operand()
1209 mode |= M6811_OP_CALL_ADDR; in get_operand()
1215 mode = M6811_OP_JUMP_REL; in get_operand()
[all …]
|
| D | tc-ns32k.c | 70 signed char mode; /* Addressing mode of operand (0-31). */ member
382 int mode; in addr_mode() local
385 mode = DEFAULT; /* Default. */ in addr_mode()
411 addrmodeP->mode = 21; /* absolute */ in addr_mode()
419 addrmodeP->mode = 20; /* immediate */ in addr_mode()
432 addrmodeP->mode = 27; /* pc-relative */ in addr_mode()
466 addrmodeP->mode = 22; in addr_mode()
489 addrmodeP->mode = str[1] - '0'; in addr_mode()
501 addrmodeP->mode = 23; /* TopOfStack */ in addr_mode()
517 mode = 16; /* Memory Relative. */ in addr_mode()
[all …]
|
| D | tc-tic4x.c | 111 tic4x_addr_mode_t mode; /* Addressing mode. */ member
1530 operand->mode = M_UNKNOWN; in tic4x_operand_parse()
1538 operand->mode = M_REGISTER; in tic4x_operand_parse()
1545 operand->mode = M_IMMED; in tic4x_operand_parse()
1554 operand->mode = M_IMMED_F; in tic4x_operand_parse()
1561 operand->mode = M_HI; in tic4x_operand_parse()
1568 operand->mode = M_IMMED; in tic4x_operand_parse()
1577 operand->mode = M_IMMED_F; in tic4x_operand_parse()
1584 operand->mode = M_IMMED; in tic4x_operand_parse()
1603 operand->mode = M_DIRECT; in tic4x_operand_parse()
[all …]
|
| D | tc-m68k.c | 484 static void install_gen_operand (int mode, int val);
485 static void install_operand (int mode, int val);
1516 the_ins.operands[0].mode = CONTROL; in m68k_ip()
1554 switch (opP->mode) in m68k_ip()
1572 switch (opP->mode) in m68k_ip()
1589 switch (opP->mode) in m68k_ip()
1611 switch (opP->mode) in m68k_ip()
1625 switch (opP->mode) in m68k_ip()
1635 switch (opP->mode) in m68k_ip()
1647 switch (opP->mode) in m68k_ip()
[all …]
|
| D | tc-i960.c | 234 int mode; /* 0 =>local/global/spec reg; 1=> literal or fp reg. */ member
650 long mode; /* Mode bits for MEMB instruction. */ in mema_to_memb() local
655 mode = MEMB_BIT | D_BIT; in mema_to_memb()
657 mode |= A_BIT; in mema_to_memb()
660 opcode |= mode; /* Set MEMB mode bits. */ in mema_to_memb()
732 regopP->mode = 0; in parse_regop()
740 regopP->mode = 1; in parse_regop()
748 regopP->mode = 0; in parse_regop()
759 regopP->mode = 1; in parse_regop()
799 regopP->mode = 0; /* Register r0 is always a good one. */ in parse_regop()
[all …]
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| D | mips16-pic-1.inc | 82 # Start a PIC function in ISA mode MODE, which is either "mips16"
84 .macro pic_prologue,mode
85 cpload_\mode
92 .macro pic_call,name,mode
94 .ifc \mode,mips16
118 # MODE selects the ISA mode of the code: either "mips16"
120 .macro callpic,name,mode
122 .set \mode
123 .ent callpic_\name\()_\mode
124 callpic_\name\()_\mode:
[all …]
|
| D | mips16-pic-3.inc | 40 .macro lstub,name,mode
41 .set \mode
50 .macro hstub,name,mode
53 lstub \name, \mode
56 .macro gstub,name,mode
58 lstub \name, \mode
|
| /toolchain/binutils/binutils-2.25/binutils/ |
| D | filemode.c | 107 mode_string (unsigned long mode, char *str) in mode_string() argument
109 str[0] = ftypelet ((unsigned long) mode); in mode_string()
110 str[1] = (mode & S_IRUSR) != 0 ? 'r' : '-'; in mode_string()
111 str[2] = (mode & S_IWUSR) != 0 ? 'w' : '-'; in mode_string()
112 str[3] = (mode & S_IXUSR) != 0 ? 'x' : '-'; in mode_string()
113 str[4] = (mode & S_IRGRP) != 0 ? 'r' : '-'; in mode_string()
114 str[5] = (mode & S_IWGRP) != 0 ? 'w' : '-'; in mode_string()
115 str[6] = (mode & S_IXGRP) != 0 ? 'x' : '-'; in mode_string()
116 str[7] = (mode & S_IROTH) != 0 ? 'r' : '-'; in mode_string()
117 str[8] = (mode & S_IWOTH) != 0 ? 'w' : '-'; in mode_string()
[all …]
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | i960-dis.c | 322 int mode; in mem() local
379 mode = (word1 >> 10) & 0xf; in mem()
382 && ((mode == 5) || (mode >= 12))) in mem()
391 if ((mem_tab[i].name == NULL) || (mode == 6)) in mem()
407 if (mode & 4) in mem()
409 ea (memaddr, mode, reg2, reg3, word1, word2); in mem()
416 if (mode & 8) in mem()
424 if (mode & 4) in mem()
428 ea (memaddr, mode, reg2, reg3, word1, word2); in mem()
435 if (mode & 8) in mem()
[all …]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/ |
| D | syntax-1.s | 4 .mode shmedia
27 .mode shcompact
30 .mode shmedia
66 .mode shcompact
71 .mode shmedia
77 .mode shcompact
82 .mode shmedia
106 .mode shcompact
127 .mode shmedia
134 .mode shcompact
[all …]
|
| D | relax-2.s | 5 .mode SHmedia
10 .mode SHcompact
12 .mode SHmedia
16 .mode SHcompact
18 .mode SHmedia
|
| /toolchain/binutils/binutils-2.25/libiberty/ |
| D | fopen_unlocked.c | 108 fopen_unlocked (const char *path, const char *mode) in fopen_unlocked() argument
110 FILE *const fp = fopen (path, mode); in fopen_unlocked()
116 fdopen_unlocked (int fildes, const char *mode) in fdopen_unlocked() argument
118 FILE *const fp = fdopen (fildes, mode); in fdopen_unlocked()
124 freopen_unlocked (const char *path, const char *mode, FILE *stream) in freopen_unlocked() argument
126 FILE *const fp = freopen (path, mode, stream); in freopen_unlocked()
|
| /toolchain/binutils/binutils-2.25/cpu/ |
| D | m32c.cpu | 234 ; QI mode gr encoding for m32c is different than for m16c. The hardware
246 ; QI mode gr encoding for m32c is different than for m16c. The hardware
258 ; HI mode gr encoding for m32c is different than for m16c. The hardware
271 ; HI mode gr encoding for m32c is different than for m16c. The hardware
284 ; SI mode gr encoding for m32c is as follows:
310 ; QI mode gr encoding for m32c is different than for m16c. The hardware
326 ; HI mode gr encoding for m32c is different than for m16c. The hardware
342 ; SI mode gr encoding for m32c is as follows:
1396 (comment "dma mode 110")
1402 (comment "dma mode 111")
[all …]
|
| D | simplify.inc | 53 (define-pmacro (df name comment attrs start length mode encode decode)
54 "Shorthand form of normal fields requiring mode, encode/decode."
55 (define-full-ifield name comment attrs start length mode encode decode)
65 mode subflds insert extract)
67 (define-full-multi-ifield name comment attrs mode subflds insert extract)
77 ; Simple multi-ifields: mode is UINT, default insert/extract support,
148 (define-pmacro (dndo x-name x-mode x-args
154 (mode x-mode)
207 ;(define-pmacro (define-normal-mode name comment attrs bits bytes
208 ; non-mode-c-type printf-type sem-mode ptr-to host?)
[all …]
|
| D | xc16x.cpu | 665 (define-pmacro (arithmetic16 name insn insn1 opc1 opc2 op1 op2 mode dir)
671 (set mode op1 (insn1 mode op1 (mem HI op2)))
685 (define-pmacro (arithmetic17 name insn insn1 opc1 opc2 op1 op2 mode dir)
691 (set mode op1 (insn1 mode op1 (mem HI op2) cbit))
705 (define-pmacro (arithmetic18 name insn insn1 opc1 opc2 op1 op2 mode dir)
721 (define-pmacro (arithmetic19 name insn insn1 opc1 opc2 op1 op2 mode dir)
727 (set (mem HI op1) (insn1 mode (mem HI op1) op2 cbit))
737 (define-pmacro (arithmetic20 name insn insn1 opc1 opc2 op1 op2 mode dir)
743 (set mode op1 (insn1 mode op1 op2))
753 (define-pmacro (arithmetic21 name insn insn1 opc1 opc2 op1 op2 mode dir)
[all …]
|
| /toolchain/binutils/binutils-2.25/ |
| D | install-sh | 70 mode=0755
129 -m) mode=$2
130 case $mode in
132 echo "$0: invalid mode: $mode" >&2
224 case $mode in
235 cp_umask=`expr '(' 777 - $mode % 1000 ')' $u_plus_rw`;;
242 cp_umask=$mode$u_plus_rw;;
315 mkdir_mode=-m$mode
426 test -z "$chmodcmd" || $doit $chmodcmd $mode "$dst"; } || exit 1
448 { test -z "$chmodcmd" || $doit $chmodcmd $mode "$dsttmp"; } &&
|
| /toolchain/binutils/binutils-2.25/ld/scripttempl/ |
| D | tic4xcoff.sc | 7 # In microcomputer (MC) mode, the vectors are mapped into the on-chip ROM,
8 # otherwise in microprocessor (MP) mode the vectors are mapped to address 0
9 # on the external bus. In MC mode, the on-chip ROM contains a bootloader program
13 # 1. MC mode, no external memory (serial boot).
14 # 2. MC mode, external RAM (serial boot).
15 # 3. MC mode, external ROM.
16 # 4. MC mode, external ROM, external RAM.
17 # 5. MP mode, external ROM.
18 # 6. MP mode, external ROM, external RAM.
19 # 7. MP mode, external RAM (dual-port with hosting CPU or external debugger).
[all …]
|
| /toolchain/binutils/binutils-2.25/gprof/ |
| D | vax.c | 121 vax_operandname (operandenum mode) in vax_operandname() argument
124 switch (mode) in vax_operandname()
213 operandenum mode = vax_operandmode (modep); in vax_offset() local
216 switch (mode) in vax_offset()
237 operandenum mode; in vax_find_call() local
276 mode = vax_operandmode (instructp + length); in vax_find_call()
279 printf ("\tsecond operand is %s\n", vax_operandname (mode))); in vax_find_call()
280 switch (mode) in vax_find_call()
|
| D | tahoe.c | 109 tahoe_operandname (tahoe_operandenum mode) in tahoe_operandname() argument
112 switch (mode) in tahoe_operandname()
202 tahoe_operandenum mode = tahoe_operandmode (modep); in tahoe_offset() local
205 switch (mode) in tahoe_offset()
225 tahoe_operandenum mode; in tahoe_find_call() local
264 mode = tahoe_operandmode (instructp + length); in tahoe_find_call()
267 printf ("\tsecond operand is %s\n", tahoe_operandname (mode)); in tahoe_find_call()
269 switch (mode) in tahoe_find_call()
|