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Searched refs:op2 (Results 1 – 25 of 38) sorted by relevance

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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dldst-reg-uns-imm.s37 .macro op2 op, reg, simm macro
45 op2 \op\suffix, \reg, \simm
49 op2 \op\suffix, \reg, \simm
51 op2 \op\suffix, \reg, "(4095*\size)"
58 op2 \op, \reg, \simm
62 op2 \op, \reg, \simm
65 op2 \op, \reg, 4095
68 op2 \op, \reg, 8190
71 op2 \op, \reg, 16380
74 op2 \op, \reg, 32760
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Dldst-reg-unscaled-imm.s35 .macro op2 op, reg, simm macro
42 op2 \op\suffix, \reg, \simm
46 op2 \op\suffix, \reg, \simm
54 op2 \op, \reg, \simm
58 op2 \op, \reg, \simm
Dldst-reg-imm-post-ind.s23 .macro op2 op, reg, simm macro
30 op2 \op\suffix, \reg, \simm
38 op2 \op, \reg, \simm
Dldst-reg-imm-pre-ind.s23 .macro op2 op, reg, simm macro
30 op2 \op\suffix, \reg, \simm
38 op2 \op, \reg, \simm
/toolchain/binutils/binutils-2.25/cpu/
Dxc16x.cpu142 (dnf f-op2 "op2" () 3 4)
200 ; insn-op2: bits 4-7
201 (define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2
214 (define-normal-insn-enum insn-rcond "relative jump condition code op2 enums" () COND_ f-rcond
665 (define-pmacro (arithmetic16 name insn insn1 opc1 opc2 op1 op2 mode dir)
669 (.str insn " $"op1 ",$"dir"$"op2)
670 (+ opc1 opc2 op1 op2)
671 (set mode op1 (insn1 mode op1 (mem HI op2)))
685 (define-pmacro (arithmetic17 name insn insn1 opc1 opc2 op1 op2 mode dir)
689 (.str insn " $"op1 ",$"dir"$"op2)
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Dm32r.cpu465 (dnf f-op2 "op2" () 8 4)
471 (dnf f-shift-op2 "shift op2" () 8 3)
489 (dnf f-op23 "op2.3" () 9 3)
514 ; insn-op2: bits 8-11
516 (define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2
816 (define-pmacro (bin-op mnemonic op2-op sem-op imm-prefix imm)
822 (+ OP1_0 op2-op dr sr)
830 (+ OP1_8 op2-op dr sr imm)
925 (define-pmacro (cbranch sym comment op2-op comp-op)
928 (+ OP1_11 op2-op (f-r1 0) src2 disp16)
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Dmt.cpu663 (sequence((HI op1) (HI op2))
668 (set op2 (and frsr2 #xffff))
669 (if (or (lt op2 (const -32768)) (gt op2 (const 32767)))
672 (set frdrrr (mul SI (ext SI op1) (ext SI op2)))
681 (sequence((HI op1) (HI op2))
686 (set op2 (and imm16 #xffff))
690 (if (eq op2 (const 0))
691 (error "op2 is 0")
693 (set frdr (mul SI (ext SI op1) (ext SI op2)))
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-pdp11.c651 struct pdp11_code insn, op1, op2; in md_assemble() local
689 op2.error = NULL; in md_assemble()
690 op2.additional = FALSE; in md_assemble()
691 op2.reloc.type = BFD_RELOC_NONE; in md_assemble()
794 str = parse_reg (str, &op2); in md_assemble()
795 if (op2.error) in md_assemble()
797 insn.code |= op2.code << 6; in md_assemble()
801 op2.error = _("Missing ','"); in md_assemble()
822 op2.error = _("Missing ','"); in md_assemble()
825 str = parse_reg (str, &op2); in md_assemble()
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Dtc-msp430.c1542 struct msp430_operand_s * op2, in try_encode_mova() argument
1555 if (op2->mode != OP_REG) in try_encode_mova()
1565 bin |= 0x80 | op2->reg; in try_encode_mova()
1587 bin |= 0x30 | (op1->reg << 8) | op2->reg; in try_encode_mova()
1620 if (op2->mode == OP_REG) in try_encode_mova()
1622 bin |= 0xc0 | (op1->reg << 8) | op2->reg; in try_encode_mova()
1628 else if (op2->am == 1) in try_encode_mova()
1630 if (op2->reg == 2) in try_encode_mova()
1636 if (op2->exp.X_op == O_constant) in try_encode_mova()
1638 bin |= (op2->exp.X_add_number >> 16) & 0xf; in try_encode_mova()
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Dxtensa-relax.c583 unsigned op2) in append_value_condition() argument
590 cond->op_data = op2; in append_value_condition()
1610 opname_map_e *op2; in build_transition() local
1643 for (op2 = op1->next; op2 != NULL; op2 = op2->next) in build_transition()
1645 if (same_operand_name (op1, op2)) in build_transition()
1648 op1->operand_num, op2->operand_num); in build_transition()
1674 op2 = NULL; in build_transition()
1688 op2 = get_opmatch (&initial_insn->t.operand_map, precond->opname2); in build_transition()
1689 if (op2 == NULL) in build_transition()
1696 if (op1 == NULL && op2 == NULL) in build_transition()
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Dtc-d10v.c695 struct d10v_opcode *op2, in check_resource_conflict() argument
710 if ((op2->exec_type & SEQ) in check_resource_conflict()
711 || ! ((op2->exec_type & PAR) || (op2->exec_type & PARONLY))) in check_resource_conflict()
714 op2->name); in check_resource_conflict()
748 op = op2; in check_resource_conflict()
831 struct d10v_opcode *op2, in parallel_ok() argument
839 if ((op1->exec_type & SEQ) != 0 || (op2->exec_type & SEQ) != 0 in parallel_ok()
840 || (op1->exec_type & PAR) == 0 || (op2->exec_type & PAR) == 0 in parallel_ok()
841 || (op1->unit == BOTH) || (op2->unit == BOTH) in parallel_ok()
842 || (op1->unit == IU && op2->unit == IU) in parallel_ok()
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Dtc-d30v.c494 opcode->ecc << 28 | op->op1 << 25 | op->op2 << 20 | form->modifier << 18; in build_insn()
681 struct d30v_insn *op2, in parallel_ok() argument
692 if ((op1->op->unit == IU && op2->op->unit == IU) in parallel_ok()
693 || (op1->op->unit == MU && op2->op->unit == MU)) in parallel_ok()
705 if ((op1->ecc == ECC_TX && op2->ecc == ECC_FX) in parallel_ok()
706 || (op1->ecc == ECC_FX && op2->ecc == ECC_TX) in parallel_ok()
707 || (op1->ecc == ECC_XT && op2->ecc == ECC_XF) in parallel_ok()
708 || (op1->ecc == ECC_XF && op2->ecc == ECC_XT)) in parallel_ok()
725 f = op2->form; in parallel_ok()
726 op = op2->op; in parallel_ok()
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/toolchain/binutils/binutils-2.25/opcodes/
Dmsp430-dis.c368 char *op2, in msp430_doubleoperand() argument
477 *op2 = 0; in msp430_doubleoperand()
605 sprintf (op2, "r0"); in msp430_doubleoperand()
608 sprintf (op2, "r1"); in msp430_doubleoperand()
611 sprintf (op2, "r2"); in msp430_doubleoperand()
614 sprintf (op2, "r%d", regd); in msp430_doubleoperand()
625 sprintf (op2, "0x%04x", PS (dst)); in msp430_doubleoperand()
633 sprintf (op2, "0x%05x", dst & 0xfffff); in msp430_doubleoperand()
644 sprintf (op2, "&0x%04x", PS (dst)); in msp430_doubleoperand()
648 sprintf (op2, "&0x%05x", dst & 0xfffff); in msp430_doubleoperand()
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Davr-dis.c296 char op1[20], op2[20], comment1[40], comment2[40]; in print_insn_avr() local
357 op2[0] = 0; in print_insn_avr()
382 ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2, in print_insn_avr()
391 op2[0] = 0; in print_insn_avr()
401 if (*op2) in print_insn_avr()
402 (*prin) (stream, ", %s", op2); in print_insn_avr()
Dd30v-dis.c40 int op2 = (num >> 20) & 0x1f; in lookup_opcode() local
46 if ((op->op1 == op1) && (op->op2 == op2)) in lookup_opcode()
55 while (op->op1 == op1 && op->op2 == op2) in lookup_opcode()
Daarch64-opc.c2697 #define CPENC(op0,op1,crn,crm,op2) \ argument
2698 ((((op0) << 19) | ((op1) << 16) | ((crn) << 12) | ((crm) << 8) | ((op2) << 5)) >> 5)
2700 #define CPEN_(op1,crm,op2) CPENC(3,(op1),4,(crm),(op2)) argument
2702 #define CPENS(op1,crn,crm,op2) CPENC(1,(op1),(crn),(crm),(op2)) argument
Darc-dis.c197 int op2, in instruction_name() argument
201 return (*state->instName)(state->_this, op1, op2, flags); in instruction_name()
/toolchain/binutils/binutils-2.25/bfd/
Delf32-h8300.c1233 unsigned char op0, op1, op2, op3; in elf32_h8_relax_section() local
1286 op2 = bfd_get_8 (abfd, op_ptr + 2); in elf32_h8_relax_section()
1291 && (op2 & 0x40) == 0x40 in elf32_h8_relax_section()
1294 if ((op2 & 0x08) == 0) in elf32_h8_relax_section()
1304 op2 &= ~0x08; in elf32_h8_relax_section()
1305 bfd_put_8 (abfd, op2, op_ptr + 2); in elf32_h8_relax_section()
1377 unsigned char op0, op1, op2, op3, op0n, op1n; in elf32_h8_relax_section() local
1390 op2 = bfd_get_8 (abfd, contents + irel->r_offset - 2); in elf32_h8_relax_section()
1395 switch(op2) in elf32_h8_relax_section()
Dcoff-sh.c2197 const struct sh_opcode *op2) in sh_insns_conflict() argument
2202 f2 = op2->flags; in sh_insns_conflict()
2220 && sh_insn_uses_or_sets_reg (i2, op2, SETS1_REG (i1))) in sh_insns_conflict()
2223 && sh_insn_uses_or_sets_reg (i2, op2, SETS2_REG (i1))) in sh_insns_conflict()
2226 && sh_insn_uses_or_sets_reg (i2, op2, 0)) in sh_insns_conflict()
2229 && sh_insn_uses_or_sets_reg (i2, op2, SETSAS_REG (i1))) in sh_insns_conflict()
2232 && sh_insn_uses_or_sets_freg (i2, op2, SETSF1_REG (i1))) in sh_insns_conflict()
2262 const struct sh_opcode *op2) in sh_load_use() argument
2276 && sh_insn_uses_reg (i2, op2, (i1 & 0x0f00) >> 8)) in sh_load_use()
2280 && sh_insn_uses_reg (i2, op2, 0)) in sh_load_use()
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Dvms-alpha.c1695 bfd_vma op2; in _bfd_vms_slurp_etir() local
2001 op2 = 0; in _bfd_vms_slurp_etir()
2007 op2 = alpha_vms_get_sym_value (h->sym->section, in _bfd_vms_slurp_etir()
2015 op2 = 0; in _bfd_vms_slurp_etir()
2018 image_write_q (abfd, op2); in _bfd_vms_slurp_etir()
2126 _bfd_vms_pop (abfd, &op2, &rel2); in _bfd_vms_slurp_etir()
2131 _bfd_vms_push (abfd, op1 + op2, rel1); in _bfd_vms_slurp_etir()
2136 _bfd_vms_pop (abfd, &op2, &rel2); in _bfd_vms_slurp_etir()
2142 op2 = alpha_vms_fix_sec_rel (abfd, info, rel2, op2); in _bfd_vms_slurp_etir()
2147 _bfd_vms_push (abfd, op2 - op1, rel1); in _bfd_vms_slurp_etir()
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/toolchain/binutils/binutils-2.25/gold/
Di386.cc3260 unsigned char op2 = view[-2]; in tls_gd_to_le() local
3263 op2 == 0x8d || op2 == 0x04); in tls_gd_to_le()
3268 if (op2 == 0x04) in tls_gd_to_le()
3322 unsigned char op2 = view[-2]; in tls_gd_to_ie() local
3325 op2 == 0x8d || op2 == 0x04); in tls_gd_to_ie()
3331 tls::check_tls(relinfo, relnum, rel.get_r_offset(), op2 == 0x04); in tls_gd_to_ie()
3333 if (op2 == 0x04) in tls_gd_to_ie()
3511 unsigned char op2 = view[-2]; in tls_ie_to_le() local
3512 if (op2 == 0x8b) in tls_ie_to_le()
3520 else if (op2 == 0x03) in tls_ie_to_le()
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/toolchain/binutils/binutils-2.25/include/opcode/
Dd30v.h78 int op2; /* the rest of the opcode */ member
Dm88k.h441 OPSPEC op1,op2,op3; member
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dneon-cov.s592 .macro binop_3typ op op1 op2 t1 t2 t3
593 \op\t1 \op1,\op2
594 \op\t2 \op1,\op2
595 \op\t3 \op1,\op2
/toolchain/binutils/binutils-2.25/binutils/
Dreadelf.c7273 unsigned int op, op2; in decode_arm_unwind_bytecode() local
7298 GET_OP (op2); in decode_arm_unwind_bytecode()
7299 if (op == 0x80 && op2 == 0) in decode_arm_unwind_bytecode()
7303 unsigned int mask = ((op & 0x0f) << 8) | op2; in decode_arm_unwind_bytecode()
7354 GET_OP (op2); in decode_arm_unwind_bytecode()
7355 if (op2 == 0 || (op2 & 0xf0) != 0) in decode_arm_unwind_bytecode()
7359 unsigned int mask = op2 & 0x0f; in decode_arm_unwind_bytecode()
7402 GET_OP (op2); in decode_arm_unwind_bytecode()
7403 first = op2 >> 4; in decode_arm_unwind_bytecode()
7404 last = op2 & 0x0f; in decode_arm_unwind_bytecode()
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