Home
last modified time | relevance | path

Searched refs:operands (Results 1 – 25 of 386) sorted by relevance

12345678910>>...16

/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Dr5900-error-vu0.l2 .*: Error: invalid operands `vabs\.w \$vf0w,\$vf0z'
4 .*: Error: invalid operands `vabs\.xw \$vf0xw,\$vf0w'
6 .*: Error: invalid operands `vabs\.xyzw \$vf0xyz,\$vf0xyzw'
8 .*: Error: invalid operands `vaddai\.w \$ACCz,\$vf0w,\$Q'
10 .*: Error: invalid operands `vaddaq\.w \$ACCw,\$vf31z,\$Q'
12 .*: Error: invalid operands `vaddaq\.x \$ACCw,\$vf1x,\$Q'
14 .*: Error: invalid operands `vaddaq\.xw \$ACCw,\$vf31xw,\$Q'
16 .*: Error: invalid operands `vaddaq\.xyw \$ACCxyw,\$vf1yw,\$Q'
18 .*: Error: invalid operands `vaddaq\.z \$ACCxz,\$vf0xz,\$Q'
20 .*: Error: invalid operands `vaddaq\.xzw \$ACCxw,\$vf0xzw,\$Q'
[all …]
Dvr5400-ill.l6 .*:14: Error: invalid operands `add.ob \$v2,\$f4,\$f6'
8 .*:16: Error: invalid operands `add.ob \$f2,\$f4,\$v6'
10 .*:20: Error: invalid operands `add.ob \$v2,\$f4,\$f6\[1\]'
12 .*:22: Error: invalid operands `add.ob \$f2,\$f4,\$v6\[1\]'
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-m68hc11.c1826 build_jump_insn (struct m68hc11_opcode *opcode, operand operands[], in build_jump_insn() argument
1837 gas_assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE); in build_jump_insn()
1841 n = operands[0].exp.X_add_number; in build_jump_insn()
1848 || (operands[0].exp.X_op == O_constant in build_jump_insn()
1868 fixup16 (&operands[0].exp, M6812_OP_JUMP_REL16, in build_jump_insn()
1881 fixup16 (&operands[0].exp, M6811_OP_IND16, M6811_OP_IND16); in build_jump_insn()
1886 if (operands[0].exp.X_op == O_constant) in build_jump_insn()
1915 fixup16 (&operands[0].exp, M6812_OP_JUMP_REL16, M6812_OP_JUMP_REL16); in build_jump_insn()
1929 fixup8 (&operands[0].exp, M6811_OP_JUMP_REL, M6811_OP_JUMP_REL); in build_jump_insn()
1941 operands[0].exp.X_add_symbol, (offsetT) n, in build_jump_insn()
[all …]
Dtc-arm.c425 } operands[ARM_IT_MAX_OPERANDS]; member
599 unsigned int operands[8]; member
3200 imm1 = inst.operands[1].imm; in add_to_lit_pool()
3201 imm2 = (inst.operands[1].regisimm ? inst.operands[1].reg in add_to_lit_pool()
3203 : ((bfd_int64_t) inst.operands[1].imm) >> 32); in add_to_lit_pool()
3207 imm2 = inst.operands[1].imm; in add_to_lit_pool()
4791 inst.operands[i].imm = exp_p->X_add_number & 0xffffffff; in parse_big_immediate()
4798 inst.operands[i].reg = (((exp_p->X_add_number >> 16) >> 16) in parse_big_immediate()
4800 inst.operands[i].regisimm = 1; in parse_big_immediate()
4830 inst.operands[i].imm = 0; in parse_big_immediate()
[all …]
Dtc-tic30.c265 unsigned int operands; /* Number of given operands. */ member
329 char *op, *operands, *line; in tic30_find_parallel_insn() local
336 operands = &first_operands[0]; in tic30_find_parallel_insn()
342 operands = &second_operands[0]; in tic30_find_parallel_insn()
367 operands[char_ptr++] = c; in tic30_find_parallel_insn()
371 operands[char_ptr++] = c; in tic30_find_parallel_insn()
379 operands[char_ptr] = '\0'; in tic30_find_parallel_insn()
645 unsigned operands[2]; /* Number of given operands for each insn. */ member
748 ordinal_names[insn.operands]); in tic30_parallel_insn()
766 ordinal_names[insn.operands]); in tic30_parallel_insn()
[all …]
Dtc-mmix.c546 get_putget_operands (struct mmix_opcode *insn, char *operands, in get_putget_operands() argument
552 char *sregend = operands; in get_putget_operands()
553 char *p = operands; in get_putget_operands()
568 if (insn->operands == mmix_operands_get) in get_putget_operands()
819 char *operands = str; in md_assemble() local
833 for (operands = str; in md_assemble()
834 is_part_of_name (*operands); in md_assemble()
835 ++operands) in md_assemble()
838 if (ISSPACE (*operands)) in md_assemble()
840 modified_char = *operands; in md_assemble()
[all …]
Dtc-sh64.c74 shmedia_operand_info operands[3]; member
2251 shmedia_operands_info *operands) in shmedia_get_operands() argument
2261 memset (operands->operands + i, 0, sizeof (operands->operands[0])); in shmedia_get_operands()
2267 shmedia_get_operand (&ptr, &operands->operands[i], info->arg[i]); in shmedia_get_operands()
2275 if (operands->operands[i].type != A_GREG_M) in shmedia_get_operands()
2282 if (operands->operands[i].type != A_FREG_G) in shmedia_get_operands()
2289 if (operands->operands[i].type != A_FVREG_G) in shmedia_get_operands()
2296 if (operands->operands[i].type != A_FMREG_G) in shmedia_get_operands()
2303 if (operands->operands[i].type != A_FPREG_G) in shmedia_get_operands()
2310 if (operands->operands[i].type != A_DREG_G) in shmedia_get_operands()
[all …]
Dtc-tic6x.c2460 tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands, in tic6x_try_encode() argument
2511 if (operands[opno].form != TIC6X_OP_EXP) in tic6x_try_encode()
2513 if (operands[opno].value.exp.X_op != O_constant) in tic6x_try_encode()
2515 ucexp = operands[opno].value.exp; in tic6x_try_encode()
2530 if (operands[opno].form != TIC6X_OP_EXP) in tic6x_try_encode()
2532 if (operands[opno].value.exp.X_op != O_constant) in tic6x_try_encode()
2540 *fix_exp = &operands[opno].value.exp; in tic6x_try_encode()
2546 sign_value = SEXT (operands[opno].value.exp.X_add_number); in tic6x_try_encode()
2562 if (operands[opno].form != TIC6X_OP_EXP) in tic6x_try_encode()
2564 if (operands[opno].value.exp.X_op != O_constant) in tic6x_try_encode()
[all …]
Dtc-d10v.c531 for (i = 0; opcode->operands[i]; i++) in build_insn()
533 flags = d10v_operands[opcode->operands[i]].flags; in build_insn()
534 bits = d10v_operands[opcode->operands[i]].bits; in build_insn()
535 shift = d10v_operands[opcode->operands[i]].shift; in build_insn()
568 get_reloc ((struct d10v_operand *) &d10v_operands[opcode->operands[i]]); in build_insn()
583 fixups->fix[fixups->fc].operand = opcode->operands[i]; in build_insn()
755 for (i = 0; op->operands[i]; i++) in check_resource_conflict()
757 flags = d10v_operands[op->operands[i]].flags; in check_resource_conflict()
758 shift = d10v_operands[op->operands[i]].shift; in check_resource_conflict()
759 mask = 0x7FFFFFFF >> (31 - d10v_operands[op->operands[i]].bits); in check_resource_conflict()
[all …]
Dtc-ia64.c5469 enum ia64_opnd opnd = idesc->operands[res_index]; in operand_match()
5646 bits = operand_width (idesc->operands[res_index]); in operand_match()
5720 fix->opnd = idesc->operands[res_index]; in operand_match()
5757 bits = operand_width (idesc->operands[res_index]); in operand_match()
5768 bits = operand_width (idesc->operands[res_index]); in operand_match()
5844 bits = operand_width (idesc->operands[res_index]); in operand_match()
5851 if (idesc->operands[res_index] == IA64_OPND_IMM14) in operand_match()
5863 fix->opnd = idesc->operands[res_index]; in operand_match()
5969 fix->opnd = idesc->operands[res_index]; in operand_match()
5988 fix->opnd = idesc->operands[res_index]; in operand_match()
[all …]
Dtc-aarch64.c3851 if (*qualifiers == instr->operands[j].qualifier) in find_best_match()
3876 instr->operands[i].qualifier = *qualifiers; in assign_qualifier_sequence()
3897 if (opcode->operands[i] == AARCH64_OPND_NIL in print_operands()
3945 enum aarch64_opnd opd_code = (idx >= 0 ? opcode->operands[idx] in output_operand_error_record()
4040 print_operands (buf, opcode, inst_base->operands); in output_operand_error_record()
4066 print_operands (buf, opcode, inst_base->operands); in output_operand_error_record()
4440 is32 = inst.base.operands[0].qualifier == AARCH64_OPND_QLF_W ? 1 : 0; in process_movw_reloc_info()
4506 inst.base.operands[1].shifter.amount = shift; in process_movw_reloc_info()
4533 enum aarch64_opnd_qualifier opd0_qlf = inst.base.operands[0].qualifier; in ldst_lo12_determine_real_reloc_type()
4534 enum aarch64_opnd_qualifier opd1_qlf = inst.base.operands[1].qualifier; in ldst_lo12_determine_real_reloc_type()
[all …]
Dtc-tic54x.c94 } operands[MAX_OPERANDS]; member
3106 get_operands (struct opstruct operands[], char *line) in get_operands() argument
3144 strncpy (operands[numexp].buf, op_start, len); in get_operands()
3145 operands[numexp].buf[len] = 0; in get_operands()
3149 while (len > 0 && ISSPACE (operands[numexp].buf[len - 1])) in get_operands()
3150 operands[numexp].buf[--len] = 0; in get_operands()
3184 memset (&operands[i].exp, 0, sizeof (operands[i].exp)); in get_operands()
3185 if (operands[i].buf[0] == '#') in get_operands()
3188 parse_expression (operands[i].buf + 1, &operands[i].exp); in get_operands()
3190 else if (operands[i].buf[0] == '@') in get_operands()
[all …]
Dtc-crx.c911 parse_operands (ins * crx_ins, char *operands) in parse_operands() argument
923 preprocess_reglist (operands, &allocated) : operands; in parse_operands()
1010 handle_LoadStor (const char *operands) in handle_LoadStor() argument
1019 if (strstr (operands, ")+") != NULL) in handle_LoadStor()
1029 if (strstr (operands, "$") != NULL) in handle_LoadStor()
1039 parse_insn (ins *insn, char *operands) in parse_insn() argument
1059 gettrap (operands) : get_cinv_parameters (operands); in parse_insn()
1066 handle_LoadStor (operands); in parse_insn()
1068 if (operands != NULL) in parse_insn()
1069 parse_operands (insn, operands); in parse_insn()
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/
Dmovpc.l2 .*:6: Error: Invalid opcode/operands
4 .*:7: Error: Invalid opcode/operands
6 .*:8: Error: Invalid opcode/operands
8 .*:9: Error: Invalid opcode/operands
10 .*:10: Error: Invalid opcode/operands
12 .*:11: Error: Invalid opcode/operands
14 .*:12: Error: Invalid opcode/operands
16 .*:13: Error: Invalid opcode/operands
18 .*:14: Error: Invalid opcode/operands
20 .*:15: Error: Invalid opcode/operands
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Daarch64-dis.c208 assert (inst->operands[i].qualifier == AARCH64_OPND_QLF_NIL); in get_expected_qualifier()
234 info->reg.regno = inst->operands[info->idx - 1].reg.regno + 1; in aarch64_ext_regno_pair()
246 && (aarch64_get_operand_class (inst->operands[0].type) in aarch64_ext_regrt_sysins()
251 info->present = inst->operands[0].sysins_op->has_xt; in aarch64_ext_regrt_sysins()
271 && inst->opcode->operands[0] == AARCH64_OPND_Ed) in aarch64_ext_reglane()
617 enum aarch64_opnd_qualifier opnd0_qualifier = inst->operands[0].qualifier; in aarch64_ext_advsimd_imm_modified()
722 assert (inst->operands[0].qualifier == AARCH64_OPND_QLF_W in aarch64_ext_limm()
723 || inst->operands[0].qualifier == AARCH64_OPND_QLF_X); in aarch64_ext_limm()
724 sf = aarch64_get_qualifier_esize (inst->operands[0].qualifier) != 4; in aarch64_ext_limm()
947 if (inst->opcode->operands[0] == AARCH64_OPND_LVt_AL) in aarch64_ext_simd_addr_post()
[all …]
Daarch64-asm.c84 && inst->opcode->operands[0] == AARCH64_OPND_Ed) in aarch64_ins_reglane()
356 enum aarch64_opnd_qualifier opnd0_qualifier = inst->operands[0].qualifier; in aarch64_ins_advsimd_imm_modified()
439 int is32 = aarch64_get_qualifier_esize (inst->operands[0].qualifier) == 4; in aarch64_ins_limm()
728 qualifier = inst->operands[1].qualifier; in encode_asimd_fcvt()
733 qualifier = inst->operands[0].qualifier; in encode_asimd_fcvt()
753 assert (inst->operands[0].qualifier == AARCH64_OPND_QLF_S_S); in encode_asisd_fcvtxn()
766 switch (inst->operands[0].qualifier) in encode_fcvt()
815 aarch64_get_qualifier_name (inst->operands[idx].qualifier)); in encode_sizeq()
816 sizeq = aarch64_get_qualifier_standard_value (inst->operands[idx].qualifier); in encode_sizeq()
852 value = (inst->operands[idx].qualifier == AARCH64_OPND_QLF_X in do_special_encoding()
[all …]
Dtic6x-dis.c324 char operands[TIC6X_MAX_OPERANDS][24] = { { 0 } }; in print_insn_tic6x() local
730 snprintf (operands[op_num], 24, "b15"); in print_insn_tic6x()
736 snprintf (operands[op_num], 24, "%c0", in print_insn_tic6x()
743 snprintf (operands[op_num], 24, "%c3", in print_insn_tic6x()
749 snprintf (operands[op_num], 24, "irp"); in print_insn_tic6x()
754 snprintf (operands[op_num], 24, "nrp"); in print_insn_tic6x()
759 snprintf (operands[op_num], 24, "ilc"); in print_insn_tic6x()
764 snprintf (operands[op_num], 24, "-1"); in print_insn_tic6x()
769 snprintf (operands[op_num], 24, "0"); in print_insn_tic6x()
774 snprintf (operands[op_num], 24, "1"); in print_insn_tic6x()
[all …]
Daarch64-opc.h206 inst->operands[idx].qualifier = AARCH64_OPND_QLF_NIL; in reset_operand_qualifier()
292 if (aarch64_get_operand_class (opcode->operands[0]) in select_operand_for_sf_field_coding()
296 else if (aarch64_get_operand_class (opcode->operands[1]) in select_operand_for_sf_field_coding()
313 if (aarch64_get_operand_class (opcode->operands[1]) in select_operand_for_fptype_field_coding()
317 else if (aarch64_get_operand_class (opcode->operands[0]) in select_operand_for_fptype_field_coding()
335 if (aarch64_get_operand_class (opcode->operands[0]) in select_operand_for_scalar_size_field_coding()
338 if (aarch64_get_operand_class (opcode->operands[1]) in select_operand_for_scalar_size_field_coding()
372 memcpy (&inst->operands[dst], &inst->operands[src], in copy_operand_info()
374 inst->operands[dst].idx = dst; in copy_operand_info()
Dd10v-dis.c169 for (i = 0; op->operands[i]; i++) in dis_long()
171 oper = (struct d10v_operand *) &d10v_operands[op->operands[i]]; in dis_long()
175 if (op->operands[i + 1] && oper->bits in dis_long()
176 && d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS in dis_long()
177 && d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS) in dis_long()
219 for (i = 0; op->operands[i]; i++) in dis_2_short()
221 oper = (struct d10v_operand *) &d10v_operands[op->operands[i]]; in dis_2_short()
225 if (op->operands[i + 1] && oper->bits in dis_2_short()
226 && d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS in dis_2_short()
227 && d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS) in dis_2_short()
Dia64-gen.c929 int i2627 = i && idesc->operands[0] == IA64_OPND_AR3; in in_iclass_mov_x()
930 int i28 = i && idesc->operands[1] == IA64_OPND_AR3; in in_iclass_mov_x()
931 int m2930 = m && idesc->operands[0] == IA64_OPND_AR3; in in_iclass_mov_x()
932 int m31 = m && idesc->operands[1] == IA64_OPND_AR3; in in_iclass_mov_x()
933 int pseudo0 = plain_mov && idesc->operands[1] == IA64_OPND_AR3; in in_iclass_mov_x()
934 int pseudo1 = plain_mov && idesc->operands[0] == IA64_OPND_AR3; in in_iclass_mov_x()
951 int i21 = idesc->operands[0] == IA64_OPND_B1; in in_iclass_mov_x()
952 int i22 = plain_mov && idesc->operands[1] == IA64_OPND_B2; in in_iclass_mov_x()
961 int m32 = plain_mov && idesc->operands[0] == IA64_OPND_CR3; in in_iclass_mov_x()
962 int m33 = plain_mov && idesc->operands[1] == IA64_OPND_CR3; in in_iclass_mov_x()
[all …]
Dia64-opc.c331 o2 = elf64_ia64_operands + main_table[place].operands[2]; in opcode_verify()
536 res->operands[0] = main_table[place].operands[0]; in make_ia64_opcode()
537 res->operands[1] = main_table[place].operands[1]; in make_ia64_opcode()
538 res->operands[2] = main_table[place].operands[2]; in make_ia64_opcode()
539 res->operands[3] = main_table[place].operands[3]; in make_ia64_opcode()
540 res->operands[4] = main_table[place].operands[4]; in make_ia64_opcode()
Daarch64-gen.c898 static operand operands[] = variable
918 const int num = sizeof (operands) / sizeof (operand); in process_operand_table()
920 for (i = 0, opnd = operands; i < num; ++i, ++opnd) in process_operand_table()
934 const int num = sizeof (operands) / sizeof (operand); in print_operand_table()
943 for (i = 0, opnd = operands; i < num; ++i, ++opnd) in print_operand_table()
979 const int num = sizeof (operands) / sizeof (operand); in print_operand_inserter()
995 for (i = 0, opnd = operands; i < num; ++i, ++opnd) in print_operand_inserter()
998 for (i = 0, opnd = operands; i < num; ++i, ++opnd) in print_operand_inserter()
1005 printf (" case %u:\n", (unsigned int)(opnd - operands)); in print_operand_inserter()
1014 printf (" case %u:\n", (unsigned int)(opnd2 - operands)); in print_operand_inserter()
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/
Dinsns-bad-1.l4 [^:]*:7: Error: too many operands to 'nop'
5 [^:]*:8: Error: too many operands to 'nop'
6 [^:]*:9: Error: too many operands to 'nop'
14 [^:]*:17: Error: bad number of operands to 'abs'
38 [^:]*:37: Error: bad number of operands to 'abs2'
44 [^:]*:42: Error: bad number of operands to 'absdp'
60 [^:]*:57: Error: bad number of operands to 'add'
62 [^:]*:59: Error: bad number of operands to 'add'
67 [^:]*:64: Error: bad number of operands to 'add'
75 [^:]*:72: Error: bad number of operands to 'addab'
[all …]
Dsploop-bad-1.l2 [^:]*:5: Error: too many operands to 'spkernel'
5 [^:]*:8: Error: too many operands to 'spkernelr'
7 [^:]*:10: Error: bad number of operands to 'sploop'
11 [^:]*:14: Error: bad number of operands to 'sploopd'
15 [^:]*:18: Error: bad number of operands to 'sploopw'
20 [^:]*:23: Error: too many operands to 'spmask'
23 [^:]*:26: Error: too many operands to 'spmaskr'
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-inval.s41 leavel # can't have 32-bit stack operands
52 pushl %eax # can't have 32-bit stack operands
54 popfl # can't have 32-bit stack operands

12345678910>>...16