| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/sh64/ |
| D | sh64.exp | 52 {{objdump -sr abi64.sd} {objdump -x abi64.xd}} "abi64.bin" }
55 {{objdump -sr abixx-noexp.sd}} "abi64-noexp.bin" }
58 {{objdump -sr abi32.sd} {objdump -x abi32.xd}} "abi32.bin" }
61 {{objdump -sr abixx-noexp.sd}} "abi32-noexp.bin" }
64 {{objdump -sr mix1.sd} {objdump -x mix1.xd}} "mix1.bin" }
67 {{objdump -sr mix1-noexp.sd}} "mix1-noexp.bin" }
70 {{objdump -sr mix2.sd} {objdump -x mix2.xd}} "mix2.bin" }
73 {{objdump -sr mix2-noexp.sd}} "mix2-noexp.bin" }
76 {{objdump -sr cmpct1.sd} {objdump -x cmpct1.xd}} "cmpct1.bin" }
79 {{objdump -sr shdl64.sd} {objdump -x shdl64.xd}} "shdl64.bin" }
[all …]
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arc/ |
| D | st.s | 21 sr r1,[r2]
22 sr r1,[14]
23 sr 1000, [r1]
24 sr 100, [r2]
25 sr r1,[10000]
26 sr 100,[10000]
27 sr 10000,[100]
|
| D | st.d | 32 50: 00 02 01 12 12010200 sr r1,\[r2\]
33 54: 0e 82 1f 12 121f820e sr r1,\[0xe\]
34 58: 00 fc 00 12 1200fc00 sr 0x3e8,\[r1\]
36 60: 64 7e 01 12 12017e64 sr 100,\[r2\]
37 64: 00 02 1f 12 121f0200 sr r1,\[0x2710\]
39 6c: 64 7e 1f 12 121f7e64 sr 100,\[0x2710\]
41 74: 64 fc 1f 12 121ffc64 sr 0x2710,\[0x64\]
|
| /toolchain/binutils/binutils-2.25/cpu/ |
| D | m32r.cpu | 243 ((sr INT -1) (dr INT -1)) ; inputs
264 ((sr INT -1)) ; inputs
271 ((sr INT)
309 ((sr INT -1) (dr INT -1)) ; inputs
330 ((sr INT -1)) ; inputs
337 ((sr INT)) ; inputs
362 ((sr INT -1) (dr INT -1)) ; inputs
383 ((sr INT -1)) ; inputs
390 ((sr INT)) ; inputs
658 ; ??? Convention says this should be o-sr, but then the insn definitions
[all …]
|
| D | or1korbis.cpu | 280 (dnop sys-sr "supervision register" ((MACH ORBIS-MACHS) SEM-ONLY) h-sys-sr …
284 (dnop sys-sr-lee "SR little endian enable bit" ((MACH ORBIS-MACHS) SEM-ONLY) h-sys-sr-l…
285 (dnop sys-sr-f "SR flag bit" ((MACH ORBIS-MACHS) SEM-ONLY) h-sys-sr-f…
286 (dnop sys-sr-cy "SR carry bit" ((MACH ORBIS-MACHS) SEM-ONLY) h-sys-sr-c…
287 (dnop sys-sr-ov "SR overflow bit" ((MACH ORBIS-MACHS) SEM-ONLY) h-sys-sr-o…
288 (dnop sys-sr-ove "SR overflow exception enable bit" ((MACH ORBIS-MACHS) SEM-ONLY) h-sys-sr-o…
452 (cti-transfer-control (not sys-sr-f) disp26)
463 (cti-transfer-control sys-sr-f disp26)
684 (set sys-sr-f (and atomic-reserve (eq addr atomic-address)))
685 (if sys-sr-f
[all …]
|
| D | sh.cpu | 159 (zext DI (reg h-sr))
163 (set (reg h-sr) newval)
168 (name h-sr)
186 (get () (and (srl (reg h-sr) 14) 1))
187 (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 14))) (sll SI newvalue 14))))
195 (get () (and (srl (reg h-sr) 13) 1))
196 (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 13))) (sll SI newvalue 13))))
204 (get () (and (srl (reg h-sr) 12) 1))
205 (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 12))) (sll SI newvalue 12))))
213 (get () (and (srl (reg h-sr) 1) 1))
[all …]
|
| D | xc16x.cpu | 100 ((dr INT -1) (sr INT -1)) ; inputs
114 ((condbit) (sr INT -1)) ; inputs
121 ((dr INT -1) (sr INT -1)) ; inputs
540 (dnop sr "source register" () h-gr f-r2)
940 (arithmetic addr add add OP1_0 OP2_0 dr sr HI)
941 (arithmetic subr sub sub OP1_2 OP2_0 dr sr HI)
991 (arithmetic3 addcr addc addc OP1_1 OP2_0 dr sr HI)
992 (arithmetic3 subcr subc subc OP1_3 OP2_0 dr sr HI)
1226 (logical andr and and OP1_6 OP2_0 dr sr HI)
1227 (logical orr or or OP1_7 OP2_0 dr sr HI)
[all …]
|
| D | cris.cpu | 213 ; Bitmask of h-gr register (0..15) and h-sr register (17..31)
276 (unit u-jump-sr "Jump-to-special-register Unit" () 1 1 ()
305 (unit u-exec-to-sr "Execution Unit" () 1 1 ()
328 ((crisv32-timing-c-sr-SI) ((crisv32 (unit u-const32) (unit u-exec-to-sr))))
329 ((crisv32-reg-sr-timing) ((crisv32 (unit u-exec-to-sr))))
330 ((crisv32-mem-sr-timing)
331 ((crisv32 (unit u-mem) (unit u-mem-r) (unit u-exec-to-sr))))
346 ((cris-reg-sr-timing) (.splice (.unsplice (simplecris-timing))
347 (.unsplice (crisv32-reg-sr-timing))))
349 ((cris-mem-sr-timing) (.splice (.unsplice (simplecris-mem-timing))
[all …]
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68k/ |
| D | mcf-movsr.s | 3 | Test all permutations of movew sr and movew ccr
7 move.w %d3,%sr | Mode 0
8 move.w #-1,%sr | Mode 7.4
9 move.w %sr,%d3 | Mode 0
|
| D | mcf-movsr.d | 10 0: 46c3 movew %d3,%sr
11 2: 46fc ffff movew #-1,%sr
12 6: 40c3 movew %sr,%d3
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/ |
| D | creg-1.d | 10 [ ]+0:[ ]+240ffd50[ ]+getcon sr,r21
27 [ ]+44:[ ]+240ffc20[ ]+getcon sr,r2
44 [ ]+88:[ ]+6d5ffc00[ ]+putcon r21,sr
61 [ ]+cc:[ ]+6c2ffc00[ ]+putcon r2,sr
|
| D | creg-1.s | 9 getcon sr,r21
45 putcon r21,sr
|
| D | immexpr32-2.d | 2 #objdump: -sr
|
| D | immexpr64-2.d | 2 #objdump: -sr
|
| D | eh-1.d | 2 #objdump: -sr
|
| /toolchain/binutils/binutils-2.25/gprof/ |
| D | ChangeLog-2012 | 72 * po/sr.po: New Serbian translation.
73 * configure.in (ALL_LINGUAS): Add sr.
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| D | cons-1.d | 1 #objdump: -sr
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | v850-opc.c | 893 unsigned long sr,selid; in insert_SRSEL1() local
900 sr = imm10 & 0x1f; in insert_SRSEL1()
902 ret = insn | selid << 27 | sr; in insert_SRSEL1()
911 unsigned long sr, selid; in extract_SRSEL1() local
917 sr = (insn & 0x001f); in extract_SRSEL1()
919 ret = (selid << 5) | sr; in extract_SRSEL1()
931 unsigned long sr, selid; in insert_SRSEL2() local
938 sr = imm10 & 0x1f; in insert_SRSEL2()
940 ret = insn | selid << 27 | sr << 11; in insert_SRSEL2()
949 unsigned long sr, selid; in extract_SRSEL2() local
[all …]
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| D | diffexp-ovwr.d | 1 #objdump: -sr
|
| D | rd-dtpoffd1.d | 1 #objdump: -sr
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| D | elf-rel3.d | 1 #objdump: -sr -j .data
|
| D | elfel-rel3.d | 1 #objdump: -sr -j .data
|
| /toolchain/binutils/binutils-2.25/gold/ |
| D | reloc.cc | 350 Section_relocs& sr(rd->relocs.back()); in do_read_relocs() local
351 sr.reloc_shndx = i; in do_read_relocs()
352 sr.data_shndx = shndx; in do_read_relocs()
353 sr.contents = this->get_lasting_view(shdr.get_sh_offset(), sh_size, in do_read_relocs()
355 sr.sh_type = sh_type; in do_read_relocs()
356 sr.reloc_count = reloc_count; in do_read_relocs()
357 sr.output_section = os; in do_read_relocs()
358 sr.needs_special_offset_handling = out_offsets[shndx] == invalid_address; in do_read_relocs()
359 sr.is_data_section_allocated = is_section_allocated; in do_read_relocs()
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| D | thumbrel.d | 1 #objdump: -sr
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| D | quad.d | 1 #objdump: -sr
|