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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Drol.d19 0+0024 <[^>]*> srl a0,a0,0x1f
22 0+0030 <[^>]*> srl a0,a1,0x1f
24 0+0038 <[^>]*> srl a0,a1,0x0
33 0+005c <[^>]*> srl at,a0,0x1
36 0+0068 <[^>]*> srl at,a1,0x1
39 0+0074 <[^>]*> srl a0,a1,0x0
40 0+0078 <[^>]*> srl a0,a1,0x0
42 0+0080 <[^>]*> srl a0,a1,0x1f
45 0+008c <[^>]*> srl a0,a1,0x1
47 0+0094 <[^>]*> srl a0,a1,0x0
[all …]
Dush.d11 0+0004 <[^>]*> srl at,a0,0x8
14 0+0010 <[^>]*> srl at,a0,0x8
18 0+0020 <[^>]*> srl a0,a0,0x8
24 0+0038 <[^>]*> srl at,a0,0x8
28 0+0048 <[^>]*> srl a0,a0,0x8
36 0+0068 <[^>]*> srl a0,a0,0x8
42 0+0080 <[^>]*> srl at,a0,0x8
45 0+008c <[^>]*> srl at,a0,0x8
52 0+00a0 <[^>]*> srl a0,a0,0x8
62 0+00c0 <[^>]*> srl a0,a0,0x8
[all …]
Dmips16.s190 srl $2,$3,0
191 srl $2,$3,1
192 srl $2,$3,8
193 srl $2,$3,9
194 srl $2,$3,31
195 srl $2,$3
Dvr5400-ill.s5 srl.ob $f2,$f4,4
6 srl.ob $f2,$f4,$f6[1]
7 srl.ob $f2,$f4,$f6
D24k-triple-stores-6.d17 20: 001f0a02 srl at,ra,0x8
20 2c: 00130a02 srl at,s3,0x8
23 38: 001e0a02 srl at,s8,0x8
Dmicromips@24k-triple-stores-6.d19 *[0-9a-f]+: 003f 4040 srl at,ra,0x8
22 *[0-9a-f]+: 0033 4040 srl at,s3,0x8
25 *[0-9a-f]+: 003e 4040 srl at,s8,0x8
Dmips64-mdmx.s250 srl.ob $v1, $v12, 18
251 srl.ob $v1, $v12, $v18
252 srl.ob $v1, $v12, $v18[6]
254 srl.qh $v1, $v12, 18
255 srl.qh $v1, $v12, $v18
256 srl.qh $v1, $v12, $v18[2]
Dulh-svr4pic.d36 0+0050 <[^>]*> srl a0,a0,0x8
77 0+00d4 <[^>]*> srl a0,a0,0x8
119 0+0160 <[^>]*> srl a0,a0,0x8
Dmips64-mdmx.d181 0+02ac <[^>]*> 7bd26052 srl\.ob \$v1,\$v12,0x12
182 0+02b0 <[^>]*> 7ad26052 srl\.ob \$v1,\$v12,\$v18
183 0+02b4 <[^>]*> 79926052 srl\.ob \$v1,\$v12,\$v18\[6\]
184 0+02b8 <[^>]*> 7bb26052 srl\.qh \$v1,\$v12,0x12
185 0+02bc <[^>]*> 7ab26052 srl\.qh \$v1,\$v12,\$v18
186 0+02c0 <[^>]*> 79326052 srl\.qh \$v1,\$v12,\$v18\[2\]
Dvr5400.s105 srl.ob $f2,$f4,$f6[3]
106 srl.ob $f4,$f6,14
Dulh-xgot.d46 0+006c <[^>]*> srl a0,a0,0x8
96 0+010c <[^>]*> srl a0,a0,0x8
149 0+01b8 <[^>]*> srl a0,a0,0x8
Dsb1-ext-mdmx.s128 srl.ob $v1, $v12, 18
129 srl.ob $v1, $v12, $v18
130 srl.ob $v1, $v12, $v18[6]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/z80/
Drotate.s65 srl a
66 srl b
67 srl c
68 srl d
69 srl e
70 srl h
71 srl l
72 srl (hl)
73 srl (ix+5)
74 srl (iy+5)
Drotate.d70 [ ]+[0-9a-f]+:[ ]+cb 3f[ ]+srl a
71 [ ]+[0-9a-f]+:[ ]+cb 38[ ]+srl b
72 [ ]+[0-9a-f]+:[ ]+cb 39[ ]+srl c
73 [ ]+[0-9a-f]+:[ ]+cb 3a[ ]+srl d
74 [ ]+[0-9a-f]+:[ ]+cb 3b[ ]+srl e
75 [ ]+[0-9a-f]+:[ ]+cb 3c[ ]+srl h
76 [ ]+[0-9a-f]+:[ ]+cb 3d[ ]+srl l
77 [ ]+[0-9a-f]+:[ ]+cb 3e[ ]+srl \(hl\)
78 [ ]+[0-9a-f]+:[ ]+dd cb 05 3e[ ]+srl \(ix\+5\)
79 [ ]+[0-9a-f]+:[ ]+fd cb 05 3e[ ]+srl \(iy\+5\)
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/
DrD_rA_rB.d108 e0: 002a srl! r0, r2
109 e2: 002a srl! r0, r2
110 e4: 054a srl! r5, r4
111 e6: 054a srl! r5, r4
112 e8: 0f4a srl! r15, r4
113 ea: 0f4a srl! r15, r4
114 ec: 0f3a srl! r15, r3
115 ee: 0f3a srl! r15, r3
116 f0: 083a srl! r8, r3
117 f2: 083a srl! r8, r3
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/
Dm32r2.s111 srl: label
112 srl r0,r1 || srl r2,r3
113 mul r0,r1 || srl r2,r3
114 srl r0,r1 || mul r2,r3
115 ldi r0,#1 || srl r2,r3
116 srl r0,r1 || ldi r2,#1
Dm32r2.d80 0+009c <srl>:
81 9c: 10 01 92 03 srl r0,r1 \|\| srl r2,r3
82 a0: 12 03 90 61 srl r2,r3 \|\| mul r0,r1
83 a4: 10 01 92 63 srl r0,r1 \|\| mul r2,r3
84 a8: 60 01 92 03 ldi r0,#1 \|\| srl r2,r3
85 ac: 10 01 e2 01 srl r0,r1 \|\| ldi r2,#1
/toolchain/binutils/binutils-2.25/cpu/
Depiphany.cpu216 (set (ifield f-disp8) (and (srl (ifield f-disp11) 3) (const 255)))
227 (set (ifield f-disp8) (and #xff (srl SI (ifield f-sdisp11) 3)))
240 (set (ifield f-imm-27-8) (srl (ifield f-imm16) 8)))
257 (set (ifield (.sym "f-" reg "-x")) (srl (ifield (.sym "f-" reg "6"))
775 (set trmbit (and (const 1) (srl val (const 0))))
776 (set invExcEnbit (and (const 1) (srl val (const 1))))
777 (set ovfExcEnbit (and (const 1) (srl val (const 2))))
778 (set unExcEnbit (and (const 1) (srl val (const 3))))
779 (set timer0bit0 (and (const 1) (srl val (const 4))))
780 (set timer0bit1 (and (const 1) (srl val (const 5))))
[all …]
Dip2k.cpu134 ; (encode (value pc) (srl WI value 13))
139 ; (encode (value pc) (srl WI value 13))
467 (set pabits (srl new_pc 13))
509 (set mulh (srl tmp 8)))
520 (set mulh (srl tmp 8)))
585 (and (srl 16bval 8) #xFF))
633 (and (srl 16bval 8) #xFF))
661 (set mulh (srl tmp 8)))
672 (set mulh (srl tmp 8)))
697 (and (srl 16bval 8) #xFF))
[all …]
Diq2000.cpu200 ((value pc) (srl USI (and USI value #x03FFFF) 2))
204 ((value pc) (srl SI (and SI value #x7FFFFF) 2))
504 (set high (add HI (srl rd-rs 16) (srl rt 16)))
513 (set high (add HI (srl rs 16) (srl rt 16)))
594 (set rd (and rd (srl #xFFFFFFFF maskl)))
619 (set rd-rt (and (sll rd-rt shamt) (srl #xFFFFFFFF rs)))
625 (set rd (and (sll rt shamt) (srl #xFFFFFFFF rs)))
716 (dni srl "shift right logical" (USES-RD USES-RT)
717 "srl $rd,$rt,$shamt"
719 (set rd (srl rt shamt))
[all …]
Dsh64-compact.cpu140 (set prbit (and (srl newvalue 19) 1))
141 (set szbit (and (srl newvalue 20) 1))
142 (set frbit (and (srl newvalue 21) 1))))
216 ((value pc) (srl SI value 1))
220 ((value pc) (srl SI value 2))
232 ((value pc) (srl SI value 1))
236 ((value pc) (srl SI value 1))
240 ((value pc) (srl SI value 2))
244 ((value pc) (srl SI value 2))
248 ((value pc) (srl SI value 1))
[all …]
Dmep-avc2.cpu263 (set avc2c3CRq (ext SI (and QI (srl avc2c3CRq 0) #xff)))
270 (set avc2c3CRq (ext SI (and HI (srl avc2c3CRq 0) #xffff)))
277 (set avc2c3CRq (zext SI (and QI (srl avc2c3CRq 0) #xff)))
284 (set avc2c3CRq (zext SI (and HI (srl avc2c3CRq 0) #xffff)))
291 (if (lt (ext SI avc2c3CRq) (ext SI 0)) (set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (…
292 (set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 0) 31) 31)))
489 (set avc2c3CRq (sra avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))
496 (set avc2c3CRq (srl avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))
503 (set avc2c3CRq (sll avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))
517 (set avc2c3CRq (srl avc2c3CRq avc2c3Imm5u24))
[all …]
Dxstormy16.cpu148 (get () (and #xF (srl psw 12)))
157 (get () (and 1 (srl psw index)))
410 (set (ifield f-abs24-2) (srl (ifield f-abs24) 8))))
431 (sll HI (nflag QI (srl value (mul ws 8))) 6))))
479 (or (and (srl HI (addc HI (and a #xF) (and b #xF) c)
495 (or (and (srl HI (sub HI (and a #xF) (and b #xF))
509 (or (and (srl HI (subc HI (and a #xF) (and b #xF) c)
524 (set-psw-carry (reg HI h-gr index) index (trunc HI tmpfoo) (and (srl tmpfoo 16) 1) 1)))
533 (set-psw-carry (reg HI h-gr index) index (trunc HI tmpfoo) (and (srl tmpfoo 16) 1) 1)))
1064 (and (srl Rd 4) #x0F))
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mep/
Dallinsn.s510 .global srl symbol
511 srl: label
512 srl $2,$11
513 srl $15,$7
514 srl $1,$7
515 srl $3,$13
516 srl $14,$1
536 srl $10,0
537 srl $9,3
538 srl $6,4
[all …]
Ddj1.s599 srl $0,$0
603 srl $15,$0
607 srl $0,$15
611 srl $15,$15
616 srl $0,0
619 srl $15,0
622 srl $0,31
625 srl $15,31

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