| /external/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 69 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in SourceNoLongerAvailable()
186 for (MCRegAliasIterator AI(Src, TRI, true); AI.isValid(); ++AI) { in CopyPropagateBlock()
210 for (MCRegAliasIterator AI(Def, TRI, false); AI.isValid(); ++AI) { in CopyPropagateBlock()
254 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in CopyPropagateBlock()
303 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in CopyPropagateBlock()
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| D | CriticalAntiDepBreaker.cpp | 61 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
76 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { in StartBlock()
190 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
308 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in ScanInstruction()
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| D | AggressiveAntiDepBreaker.cpp | 153 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
169 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
302 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HandleLastUse()
378 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
409 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in PrescanInstruction()
668 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters()
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| D | MachineRegisterInfo.cpp | 423 for (MCRegAliasIterator AI(PhysReg, getTargetRegisterInfo(), true); in isConstantPhysReg()
478 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { in isPhysRegModified()
492 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); in isPhysRegUsed()
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| D | DeadMachineInstructionElim.cpp | 162 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
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| D | RegisterClassInfo.cpp | 58 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
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| D | RegAllocFast.cpp | 365 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in usePhysReg()
424 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in definePhysReg()
472 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in calcSpillCost()
729 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in handleThroughOperands()
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| D | MachineLICM.cpp | 393 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in ProcessMI()
413 for (MCRegAliasIterator AS(Reg, TRI, true); AS.isValid(); ++AS) { in ProcessMI()
463 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) in HoistRegionPostRA()
486 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HoistRegionPostRA()
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| D | MachineCSE.cpp | 234 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in hasLivePhysRegDefUses()
263 for (MCRegAliasIterator AI(PhysDefs[i], TRI, true); AI.isValid(); ++AI) in hasLivePhysRegDefUses()
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| D | CallingConvLower.cpp | 63 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in MarkAllocated()
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| D | LiveDebugValues.cpp | 216 for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI) in transferRegisterDef()
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| D | RegisterScavenging.cpp | 325 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI) in findSurvivorReg()
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| D | MachineInstr.cpp | 1665 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in print()
1811 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); in addRegisterKilled()
1883 MCRegAliasIterator(Reg, RegInfo, false).isValid(); in addRegisterDead()
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| D | ExecutionDepsFix.cpp | 749 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true); in runOnMachineFunction()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 79 for(MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in init()
123 for(MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in init()
176 for(MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in init()
189 for(MCRegAliasIterator SRI(R2, &RI, !MCSubRegIterator(R2, &RI).isValid()); in init()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 630 class MCRegAliasIterator {
640 MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, in MCRegAliasIterator() function
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| /external/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 334 for (MCRegAliasIterator AI(*R, &TRI, true); AI.isValid(); ++AI) in setCallerSaved()
344 for (MCRegAliasIterator AI(R, &TRI, false); AI.isValid(); ++AI) in setUnallocatableRegs()
394 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in isRegInSet()
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DbgValueHistoryCalculator.cpp | 140 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI) in applyToClobberedRegisters()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 453 for (MCRegAliasIterator AI(X86::R8 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
457 for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
463 for (MCRegAliasIterator AI(X86::XMM0 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.cpp | 93 for (MCRegAliasIterator AI(SP::D16 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
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| D | DelaySlotFiller.cpp | 332 for (MCRegAliasIterator AI(Reg, Subtarget->getRegisterInfo(), true); in IsRegInSet()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CollectLOH.cpp | 354 for (MCRegAliasIterator AI(CurReg, TRI, true); AI.isValid(); ++AI) { in initReachingDef()
1025 for (MCRegAliasIterator AI(CurReg, TRI, true); AI.isValid(); ++AI) in collectInvolvedReg()
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| D | AArch64LoadStoreOptimizer.cpp | 816 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in trackRegDefsUses()
820 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in trackRegDefsUses()
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| D | AArch64A57FPLoadBalancing.cpp | 514 MCRegAliasIterator AI(J.getReg(), TRI, /*IncludeSelf=*/true); in scavengeRegister()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 29 MCRegAliasIterator R(Reg, this, true); in reserveRegisterTuples()
|