Searched refs:SPI (Results 1 – 25 of 26) sorted by relevance
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| /device/google/contexthub/firmware/os/platform/stm32/ |
| D | bl.c | 95 static struct StmSpi *SPI; variable
385 (void)SPI->DR; in blResetRxData()
386 while (!(SPI->SR & 1)); in blResetRxData()
387 (void)SPI->DR; in blResetRxData()
392 while (!(SPI->SR & 2)); in blSpiTxRxByte()
393 SPI->DR = val; in blSpiTxRxByte()
394 while (!(SPI->SR & 1)); in blSpiTxRxByte()
395 return SPI->DR; in blSpiTxRxByte()
414 SPI = (struct StmSpi*)SPI1_BASE; in blSetup()
464 SPI->CR1 = 0x00000040; //spi is on, configured same as bootloader would in blConfigIo()
[all …]
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| D | spi.c | 533 void SPI##_n##_IRQHandler(); \
534 void SPI##_n##_IRQHandler() \
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| /device/google/contexthub/firmware/os/drivers/st_lsm6dsm/ |
| D | README | 2 Driver is by default configured to work on STMicroelectronics nucleo board using SPI.
6 SPI bus ID : 1 (PB12: SPI_NSS, PB13: SPI_CLK, PB14: SPI_MISO, PB15: SPI_MOSI)
7 SPI frequency: 10MHz
43 Regarding SPI:
44 #define LSM6DSM_SPI_SLAVE_BUS_ID 1 /* SPI bus ID, on STM32F…
45 #define LSM6DSM_SPI_SLAVE_FREQUENCY_HZ 10000000 /* SPI frequency in Hz */
46 #define LSM6DSM_SPI_SLAVE_CS_GPIO GPIO_PB(12) /* SPI NSS pin, on STM32…
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| D | RhProxy.asl | 40 "\\_SB.SPI1", // ResourceSource: SPI bus controller name
148 // SPI Mapping
149 Package(2) { "bus-SPI-SPI0", Package() { 0 }},
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| D | PCI_DRC.ASL | 43 // SPI BAR. Check if the hard code meets the real configuration.
46 Memory32Fixed(ReadWrite,0x0FED01000,0x01000,SPIB) // SPI BAR
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| D | PciTree.asl | 123 // LPSS SPI
195 // LPSS SPI
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| D | PchLpss.asl | 326 // LPIO1 SPI
338 Name (_DDN, "Intel(R) SPI Controller - 80860F0E")
343 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {41} // SPI IRQ
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| D | IoTVirtualDevice.asl | 28 "\\_SB.SPI1", // ResourceSource: SPI bus controller name
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| D | GloblNvs.asl | 226 SP0A, 32, // SPI
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| D | Pch.asl | 65 L15D, 1, // (5) LPIO1 SPI Disable
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| D | Platform.asl | 588 If (LOr(LEqual(L15D, 0), LEqual(SD1D, 0))) // LPIO1 SPI or SCC SDIO #1 exist
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Spi/ |
| D | PchSpiSmm.inf | 4 # Component description file for the SPI SMM driver.
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| D | PchSpiRuntime.inf | 2 # Component description file for the SPI Runtime driver.
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| /device/linaro/bootloader/edk2/NetworkPkg/Application/IpsecConfig/ |
| D | PolicyEntryOperation.h | 42 #define SPI BIT(23) macro
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| D | PolicyEntryOperation.c | 625 *Mask |= SPI; in CreateSadEntry()
960 if ((*Mask & (SPI|IPSEC_PROTO|LOCAL|REMOTE)) != (SPI|IPSEC_PROTO|LOCAL|REMOTE)) { in CreateSadEntry()
1561 if ((Mask & SPI) == 0) { in CombineSadEntry()
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| D | IpSecConfigStrings.uni | 99 … " --spi spi required SPI value\n"
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/ |
| D | Platform.inc | 35 ; ROM/SPI/MEMORY Definitions
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| D | Flat32.S | 30 # ROM/SPI/MEMORY Definitions
484 # Open up full 8MB SPI decode
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/ |
| D | Build_IFWI.bat | 164 echo /yL Enable SPI lock
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| D | bldX64.bat | 208 @echo SPI Images location: Build\%PLATFORM_PACKAGE%\%TARGET%_%TOOL_CHAIN_TAG%\ROM
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| D | PlatformPkg.dec | 191 #I2C and SPI support
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/ |
| D | Platform.asl | 338 // Include asi files for I2C and SPI onboard devices.
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/ |
| D | QuarkMin.fdf | 30 …Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
33 # Address 0x0 (0xFF800000 for 8 MB SPI part)
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| D | Quark.fdf | 30 …Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
33 # Address 0x0 (0xFF800000 for 8 MB SPI part)
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| D | QuarkPlatformPkg.dec | 935 ## The size, in bytes, of the SPI FLASH part attached to Quark SOC X1000
937 # @Prompt The SPI FALSH Part Size
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