/external/conscrypt/common/src/main/java/org/conscrypt/ |
D | OpenSSLCipher.java | 61 CTR, enumConstant 642 case CTR: in checkSupportedMode() 701 public static class CTR extends AES { class in OpenSSLCipher.EVP_CIPHER.AES 702 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES.CTR 703 super(Mode.CTR, Padding.NOPADDING); in CTR() 762 public static class CTR extends AES_128 { class in OpenSSLCipher.EVP_CIPHER.AES_128 763 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES_128.CTR 764 super(Mode.CTR, Padding.NOPADDING); in CTR() 817 public static class CTR extends AES_256 { class in OpenSSLCipher.EVP_CIPHER.AES_256 818 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES_256.CTR [all …]
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/external/boringssl/src/crypto/cipher/test/ |
D | cipher_tests.txt | 175 Cipher = AES-128-CTR 182 Cipher = AES-128-CTR 189 Cipher = AES-128-CTR 196 Cipher = AES-256-CTR 203 Cipher = AES-256-CTR 210 Cipher = AES-256-CTR 218 Cipher = AES-128-CTR
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 504 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 515 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 572 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 586 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 654 else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in InsertBranch() 669 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in InsertBranch() 697 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in canInsertSelect() 1205 if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR) in ReverseBranchCondition() 1284 if (I->definesRegister(PPC::CTR) || I->definesRegister(PPC::CTR8)) in MBBDefinesCTR() 1330 if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR) { in PredicateInstruction() [all …]
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D | PPCRegisterInfo.td | 210 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>; 349 // The CTR registers are not allocatable because they're used by the 352 def CTRRC : RegisterClass<"PPC", [i32], 32, (add CTR)> {
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D | PPCInstrInfo.td | 1151 let isBranch = 1, isIndirectBranch = 1, Uses = [CTR] in { 1215 let isReturn = 1, Defs = [CTR], Uses = [CTR, LR, RM] in { 1230 let Defs = [CTR], Uses = [CTR] in { 1290 let Uses = [CTR, RM] in { 1321 let Defs = [CTR], Uses = [CTR, RM] in { 1347 let Defs = [CTR], Uses = [CTR, LR, RM] in { 1384 isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in 1403 let Defs = [CTR] in 2309 let Uses = [CTR] in { 2314 let Defs = [CTR], Pattern = [(PPCmtctr i32:$rS)] in { [all …]
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D | PPCCTRLoops.cpp | 625 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8)) in clobbersCTR() 628 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8)) in clobbersCTR()
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D | PPCRegisterInfo.cpp | 215 Reserved.set(PPC::CTR); in getReservedRegs()
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D | PPCISelLowering.cpp | 4505 Ops.push_back(DAG.getRegister(isPPC64 ? PPC::CTR8 : PPC::CTR, PtrVT)); in PrepareCall() 4623 cast<RegisterSDNode>(Callee)->getReg() == PPC::CTR) || in FinishCall()
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/external/llvm/test/CodeGen/PowerPC/ |
D | ctrloop-large-ec.ll | 19 ; On PPC32, CTR is also 32 bits, and so cannot hold a 64-bit count.
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/external/clang/lib/StaticAnalyzer/Core/ |
D | SVals.cpp | 54 if (const FunctionCodeRegion *CTR = R->getAs<FunctionCodeRegion>()) in getAsFunctionDecl() local 55 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(CTR->getDecl())) in getAsFunctionDecl()
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/external/lzma/DOC/ |
D | Methods.txt | 119 x4 - CTR
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCRegisterInfo.td | 255 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>; 321 def CTRRC : RegisterClass<"PPC", [i32], 32, (add CTR)>;
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D | PPCInstrInfo.td | 410 let isBranch = 1, isIndirectBranch = 1, Uses = [CTR] in 439 LR,CTR, 450 let Uses = [CTR, RM] in { 464 LR,CTR, 476 let Uses = [CTR, RM] in { 504 isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in 1062 let Uses = [CTR] in { 1067 let Defs = [CTR], Pattern = [(PPCmtctr GPRC:$rS)] in {
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D | PPCISelLowering.cpp | 2683 Ops.push_back(DAG.getRegister(isPPC64 ? PPC::CTR8 : PPC::CTR, PtrVT)); in PrepareCall() 2770 cast<RegisterSDNode>(Callee)->getReg() == PPC::CTR) || in FinishCall()
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/external/libunwind_llvm/src/ |
D | UnwindRegistersSave.S | 140 ; save CTR register
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/external/libunwind/src/ptrace/ |
D | _UPT_reg_offset.c | 385 [UNW_PPC##b##_CTR] = UNW_PPC_PT(CTR), \
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/external/valgrind/VEX/orig_ppc32/ |
D | date.orig | 56 13: PUTL t8, CTR 158 83: GETL CTR, t62 160 85: PUTL t62, CTR 183 8: GETL CTR, t6 185 10: PUTL t6, CTR 2548 21: PUTL t16, CTR 2552 23: GETL CTR, t18 3280 21: PUTL t16, CTR 3284 23: GETL CTR, t18 4324 21: PUTL t16, CTR [all …]
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D | return0.orig | 56 13: PUTL t8, CTR 158 83: GETL CTR, t62 160 85: PUTL t62, CTR 183 8: GETL CTR, t6 185 10: PUTL t6, CTR 2548 21: PUTL t16, CTR 2552 23: GETL CTR, t18 3280 21: PUTL t16, CTR 3284 23: GETL CTR, t18 4324 21: PUTL t16, CTR [all …]
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/external/boringssl/src/crypto/obj/ |
D | objects.txt | 892 : AES-128-CTR : aes-128-ctr 893 : AES-192-CTR : aes-192-ctr 894 : AES-256-CTR : aes-256-ctr
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/external/valgrind/memcheck/ |
D | mc_machine.c | 180 if (o == GOF(CTR) && sz == 8) return o; in get_otrack_shadow_offset_wrk() 379 if (o == GOF(CTR) && sz == 4) return o; in get_otrack_shadow_offset_wrk()
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
D | PPCAsmParser.cpp | 1276 RegNo = isPPC64()? PPC::CTR8 : PPC::CTR; in MatchRegisterName()
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/external/openssh/ |
D | config.h.in | 1465 /* libcrypto has EVP AES CTR */
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D | configure.ac | 2527 AC_MSG_CHECKING([whether OpenSSL has AES CTR via EVP]) 2540 [libcrypto has EVP AES CTR])
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D | ChangeLog | 2287 use since we only need encrypt for AES-CTR) 5291 needed to build AES CTR mode against OpenSSL 0.9.8f and above. ok djm
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/external/bouncycastle/patches/ |
D | bcprov.patch | 6999 else if (modeName.startsWith("CTR"))
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